High-speed multiplier for digital signal processing

Susamma Barua

doi:10.1117/12.56029

1 December 1991 High-speed multiplier for digital signal processing

Susamma Barua

Author Affiliations +

Optical Engineering, Vol. 30, Issue 12, (December 1991). https://doi.org/10.1117/12.56029

Abstract

A high-speed optical system capable of performing n-bit multiplication in a time proportional to log₂n is presented. The simultaneous generation and the optical regrouping of all the partial products and the pairwise addition of the partial products by means of a binary tree of adders capable of adding any two numbers in a single stage (by completely eliminating the carry propagation chain) are unique features of this multiplier. The input data to the multiplier can be in either a binary or a modified signed digit number system. The simultaneous generation and the pairwise addition of the partial products are accomplished by means of the principle of symbolic substitution logic that was originally proposed by Brenner.

Citation Download Citation

Susamma Barua "High-speed multiplier for digital signal processing," Optical Engineering 30(12), (1 December 1991). https://doi.org/10.1117/12.56029

Published: 1 December 1991

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