Buffered infrared detector array interfacing

Steven G. Howard; Marvin White

doi:10.1117/1.601990

1 December 1998 Buffered infrared detector array interfacing

Steven G. Howard, Marvin White

Optical Engineering, Vol. 37, Issue 12, (December 1998). https://doi.org/10.1117/1.601990

New results from buffered interfacing techniques used with short-wavelength IR photodiode arrays at room temperature are presented and analyzed. Performance of linear Ge and InGaAs arrays is shown not to be limited by detector characteristics at room temperature, but instead by on-focal-plane hybrid interfacing electronics. Two key issues associated with Si complementary metal-oxide semiconductor (CMOS) interfacing circuitry are input offset voltage, which results in excessive dark currents, and input voltage noise with excessive 1/f characteristics. An analysis of white and 1/f noise generated by both detector and preamplifier is presented. Improved noise performance models give excellent agreement with experimental data. Proposed improvements in readout electronics will result in improved sensitivity and will relax costly cooling requirements associated with detectors.

Citation Download Citation

Steven G. Howard and Marvin White "Buffered infrared detector array interfacing," Optical Engineering 37(12), (1 December 1998). https://doi.org/10.1117/1.601990

Published: 1 December 1998

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available