Interoperation of 400GBASE-LR8 physical interfaces using CFP8 pluggable modules

Yang Yue; Qiang Wang; Jian Yao; Jason O’Neil; Daniel Pudvay; Jon Anderson

doi:10.1117/12.2505179

15 November 2018 Interoperation of 400GBASE-LR8 physical interfaces using CFP8 pluggable modules

Yang Yue, Qiang Wang, Jian Yao, Jason O’Neil, Daniel Pudvay, Jon Anderson

Proceedings Volume 10964, Tenth International Conference on Information Optics and Photonics; 109641B (2018) https://doi.org/10.1117/12.2505179
Event: Tenth International Conference on Information Optics and Photonics (CIOP 2018), 2018, Beijing, China

Abstract

In this talk, we first review the current status for 400GBASE client-side optics standard and multi-source agreement (MSA). We then compare different form factors for 400GE modules, like CFP8, OSFP and QSFP-DD. The essential techniques to implement 400GE, like pulse amplitude modulation (PAM4), forward error correction (FEC) and continuous time-domain linear equalizer (CTLE), are discussed. A 400GE physical interface card (PIC) in Juniper’s PTX5000 platform has been developed, conforming to latest IEEE802.3bs standard. To validate the PIC’s performance, a commercial optical network tester (ONT) and the PIC are optically interconnected through two CFP8-LR8 modules. The CFP8-LR8 module utilizes 8 optical wavelengths through coarse wavelength division multiplexing (CWDM). Each wavelength carries 50Gb/s PAM4 signal. The signal transmits through 10km single mode fiber (SMF). The ONT generates framed 400GE signal and sends it to PIC through the first CFP8 module. The PIC recovers the signal, performs an internal loopback, and sends 400GE signal back to the ONT through the second CFP8 module. The optical spectrum, eye diagram, receiver sensitivity, long time soaking results, and internal digital diagnosis monitoring (DDM) result are fully characterized. The pre-FEC bit error rate (BER) is well below the KP4 FEC threshold of 2.2e-4. After KP4 FEC, error-free performance over 30km SMF is achieved. In this way, we demonstrate both the inter-operation between the PIC and the ONT, as well as the inter-operation between two CFP8 modules. This demonstration represents the successful implementation of 400GE interface in the core IP/MPLS router.

Citation Download Citation

Yang Yue, Qiang Wang, Jian Yao, Jason O’Neil, Daniel Pudvay, and Jon Anderson "Interoperation of 400GBASE-LR8 physical interfaces using CFP8 pluggable modules", Proc. SPIE 10964, Tenth International Conference on Information Optics and Photonics, 109641B (15 November 2018); https://doi.org/10.1117/12.2505179

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KEYWORDS

Photonic integrated circuits

Interfaces

Signal attenuation

Single mode fibers

Forward error correction

Eye

Field programmable gate arrays

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