Mapping technique for VLSI/WSI implementation of multidimensional systolic arrays

Mohamed B. Abdelrazik

doi:10.1117/12.24220

1 September 1990 Mapping technique for VLSI/WSI implementation of multidimensional systolic arrays

Mohamed B. Abdelrazik

Proceedings Volume 1360, Visual Communications and Image Processing '90: Fifth in a Series; (1990) https://doi.org/10.1117/12.24220
Event: Visual Communications and Image Processing '90, 1990, Lausanne, Switzerland

Abstract

This paper describes a mapping technique for transforming a linear systolic array into multidimensional systolic arrays in order to achieve high-speed with less overhead. This technique is systematic, therefore, it would be useful for logic synthesis. The application of this technique in DSP and numerical computations reduces the design time which results in low design cost. This technique produces various structures (semi-systolic, quasi-systolic and pure systolic arrays) which could be considered as application specific array processors.

Citation Download Citation

Mohamed B. Abdelrazik "Mapping technique for VLSI/WSI implementation of multidimensional systolic arrays", Proc. SPIE 1360, Visual Communications and Image Processing '90: Fifth in a Series, (1 September 1990); https://doi.org/10.1117/12.24220

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