Paper
1 November 1991 Performance analysis through memory of a proposed parallel architecture for the efficient use of memory in image processing applications
Abdullah Faruque, David Yushan Fong
Author Affiliations +
Abstract
This paper presents an analytical method to measure the performance through memory of a proposed parallel processing computer architecture for image processing applications. We developed an analytical model of our proposed architecture and a conventional architecture with respect to the system's local and main memory to measure and compare the performances of these two systems. From our model we can evaluate the performance of the proposed architecture in terms of processor utilization, number of busy memory modules and the fraction of the programs data structure resident in local memory. The main idea behind our proposed architecture is to carry out image processing work in a highly parallel manner so that the response time is shorter. The proposed architecture keeps both the processor and the memory system as busy as possible in order to obtain faster response time and proper utilization of the hardware compared to a conventional parallel processing architecture. Our proposed architecture consists of an array of processing elements (PEs), a system control unit (SCU), interconnection network and memory modules. Each PE contains two central processing units (CPU), one is responsible for the execution of all non-memory operations and the other is responsible for all memory operations. The overall response time of a job is faster because we divide the actual execution and the memory operation into two separate entities and carry them out concurrently. We also present an image processing algorithm suitable for the proposed architecture and analyze their performance compared to the conventional system.
© (1991) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Abdullah Faruque and David Yushan Fong "Performance analysis through memory of a proposed parallel architecture for the efficient use of memory in image processing applications", Proc. SPIE 1606, Visual Communications and Image Processing '91: Image Processing, (1 November 1991); https://doi.org/10.1117/12.50389
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Cited by 8 scholarly publications.
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KEYWORDS
Image processing

Computer architecture

Algorithm development

Visual communications

Parallel processing

Performance modeling

Control systems

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