Paper
1 October 1995 PC/ATM interface accelerator using reconfigurable technology
Jean-Francois Guillaud, Gerald Ouvradou, Jean-Daniel Laisne, Jo Le Drezen, Bernt Weber
Author Affiliations +
Abstract
Current high-speed communication networks exhibit gigabit bandwidths. Nevertheless, applications cannot take advantage of these advances due to host interface and machine and system architecture limitations. Today, the main concern is to reduce the protocol overheads imposed on data transfers, minimizing memory copies and implementing off-host communication functions. We propose a novel architecture for real-time distributed systems using a 155Mbit/sATM network. The system is based on an intelligent communication interface board for PCs, which integrates a Transputer, an FPGA and a VRAM to implement flexible high level communication services. These services are multiple copy updates of distributed real-time data on monitoring machines, transfers of audio and video streams coming from several cameras. The main advantages of our architecture over traditional systems include the reduction of the multimedia load imposed on the host processor, the provision of an efficient real-time data service for applications, and the support of existing standard protocols such as TCP/IP for traditional data. The board is being developed and will soon be experimented on a platform with live applications. The interest of this work is reinforced by the fact that integration of a processor and FPGA on a single chip will be available in the near future. Keywords: Asynchronous Transfer Mode (ATM), high speed networks, communication interface architecture, Field Programmable Gate Array (FPGA), Transputer, real-time, distributed applications, multimedia
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Jean-Francois Guillaud, Gerald Ouvradou, Jean-Daniel Laisne, Jo Le Drezen, and Bernt Weber "PC/ATM interface accelerator using reconfigurable technology", Proc. SPIE 2608, Emerging High-Speed Local-Area Networks and Wide-Area Networks, (1 October 1995); https://doi.org/10.1117/12.224199
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Cited by 1 scholarly publication.
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KEYWORDS
Asynchronous transfer mode

Field programmable gate arrays

Video

Interfaces

Switches

Telecommunications

Network architectures

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