Low-power highly miniaturized image sensor technology

Karmak Mansoorian; Eric R. Fossum

doi:10.1117/12.263135

6 January 1997 Low-power highly miniaturized image sensor technology

Karmak Mansoorian, Eric R. Fossum

Proceedings Volume 2933, Terrorism and Counter-Terrorism Methods and Technologies; (1997) https://doi.org/10.1117/12.263135
Event: Enabling Technologies for Law Enforcement and Security, 1996, Boston, MA, United States

Abstract

A second generation image sensor technology has been developed at the NASA Jet Propulsion Laboratory with performance comparable to charge-coupled device (CCDs). This sensor is implemented using the industry-standard complementary metal-oxide semiconductor (CMOS) technology employed for nearly all microprocessors and memory chips and thus takes advantage of the rapid worldwide development of this technology. The CMOS active pixel sensor (APS) maintains the performance of CCDs regarding noise and quantum efficiency and offers unique advantages for ultra low power focal plane operation and integration of supporting electronics such as timing, control, clock, signal chains and analog-to-digital converters. This paper describes the technology for implementing a low power camera-on-a-chip.

Citation Download Citation

Karmak Mansoorian and Eric R. Fossum "Low-power highly miniaturized image sensor technology", Proc. SPIE 2933, Terrorism and Counter-Terrorism Methods and Technologies, (6 January 1997); https://doi.org/10.1117/12.263135

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