Toward terabit/s input to silicon VLSI: a demonstrator experiment

Andrew C. Walker; Stuart J. Fancey; M. G. Forbes; Gerald Stuart Buller; Mohammad R. Taghizadeh; Marc P.Y. Desmulliez; Julian A. B. Dines; C. R. Stanley; G. Pennelli; Andrew Boyd; J. L. Pearson; Paul G. Horan; Declan Byrne; John Hegarty; Sven Eitel; Hans-Peter Gauggel; Karlheinz H. Gulden; A. Gauthier; P. Benabes; J. L. Gutzwiller; Michel Goetz

doi:10.1117/12.386863

24 May 2000 Toward terabit/s input to silicon VLSI: a demonstrator experiment

Andrew C. Walker, Stuart J. Fancey, M. G. Forbes, Gerald Stuart Buller, Mohammad R. Taghizadeh, Marc P.Y. Desmulliez, Julian A. B. Dines, C. R. Stanley, G. Pennelli, Andrew Boyd, J. L. Pearson, Paul G. Horan, Declan Byrne, John Hegarty, Sven Eitel, Hans-Peter Gauggel, Karlheinz H. Gulden, A. Gauthier, P. Benabes, J. L. Gutzwiller, Michel Goetz

Author Affiliations +

Proceedings Volume 4089, Optics in Computing 2000; (2000) https://doi.org/10.1117/12.386863
Event: 2000 International Topical Meeting on Optics in Computing (OC2000), 2000, Quebec City, Canada

Abstract

The physical limit on electronic data communication rates between silicon chips is projected to be of the order of Tbit/s over cm-scale connections. The semiconductor industry predicts that this level of i/o is likely to be required in the near future. Free-space optical connections to silicon VLSI are potentially able to offer much higher data-rates than electrical interconnects and are promising for future high-performance electronic systems. We have assembled the components of an optoelectronic 15 Gbit/s crossbar switch designed to include, internally, an optical data rate to a hybrid InGaAs/silicon chip in the Tbit/s regime. Input to the demonstrator is by an 8 X 8 VCSEL array operating at 250 Mbit/s channel, and these 64 channels are fanned out 8 X 8 times to give the high data rate onto the hybrid chip. This chip includes an array of 4096 InGaAs-based detectors flip chip bonded to silicon CMOS. The custom- designed CMOS performs packet routing under the control of an optical clock and the routed signals are output via differential modulator pairs, interlaced between the detectors on the InGaAs chip.

Citation Download Citation

Andrew C. Walker, Stuart J. Fancey, M. G. Forbes, Gerald Stuart Buller, Mohammad R. Taghizadeh, Marc P.Y. Desmulliez, Julian A. B. Dines, C. R. Stanley, G. Pennelli, Andrew Boyd, J. L. Pearson, Paul G. Horan, Declan Byrne, John Hegarty, Sven Eitel, Hans-Peter Gauggel, Karlheinz H. Gulden, A. Gauthier, P. Benabes, J. L. Gutzwiller, and Michel Goetz "Toward terabit/s input to silicon VLSI: a demonstrator experiment", Proc. SPIE 4089, Optics in Computing 2000, (24 May 2000); https://doi.org/10.1117/12.386863

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
5 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Silicon

Vertical cavity surface emitting lasers

Modulators

Sensors

Very large scale integration

Free space optics

Switches

Show All Keywords

Keywords/Phrases

Search In:

Publication Years