Paper
7 May 2004 On the design and performance study of 2-to-1 switching node for all-optical packet switching
Author Affiliations +
Proceedings Volume 5281, Optical Transmission, Switching, and Subsystems; (2004) https://doi.org/10.1117/12.522003
Event: Asia-Pacific Optical and Wireless Communications, 2003, Wuhan, China
Abstract
This paper investigates the implementing techniques concerning 2-to-1 node receiver for all-optical packet switching. We point out that the state-of-the-art technologies introduced in the literatures are all associated with one main limitation, i.e., even if two incoming packets are directed to the different ports and thus no contention will occur, they can not be directed to the output ports simultaneously. To overcome this problem, a novel node receiver model is proposed in this paper. This work presents a solution that makes use of fiber delay-lines (FDLs) which allow multiple packets to be concurrently stored or transmitted. With a novel switch control, it is shown that this solution is very efficient to resolve contention, and overcomes the limitation existing in the current models (e.g., Quadro, M-Quadro and COD architectures). We describe and analyze the concrete scheduling of the switches. Simulation results based on bursty and non-bursty traffic scenarios demonstrate that the proposed node architecture (1) performs well in terms of performance metrics such as packet loss probability; (2) has a simple control requirement. In addition, we find that the required number of the recirculating time of the packets is minimal.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Zhizhong Zhang, Huandong Zhao, Yunlin Zhang, Qingji Zeng, Jiangtao Luo, and Jianxin Wang "On the design and performance study of 2-to-1 switching node for all-optical packet switching", Proc. SPIE 5281, Optical Transmission, Switching, and Subsystems, (7 May 2004); https://doi.org/10.1117/12.522003
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KEYWORDS
Switches

Receivers

Computer architecture

Packet switching

Switching

Oxygen

Network architectures

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