Study and implementation using FPGA of RTT in EPON

Xueyi Li; Wei-ping Liu; Liming Zheng; Hong-bin Huang; Junbin Fang; Shun-er Chen

doi:10.1117/12.575388

8 February 2005 Study and implementation using FPGA of RTT in EPON

Xueyi Li, Wei-ping Liu, Liming Zheng, Hong-bin Huang, Junbin Fang, Shun-er Chen

Proceedings Volume 5626, Network Architectures, Management, and Applications II; (2005) https://doi.org/10.1117/12.575388
Event: Asia-Pacific Optical Communications, 2004, Beijing, China

Abstract

Nowadays, EPON technology is regarded as one of the best candidate technology for next generation broadband access technology. In this paper, the architecture of EPON is introduced first. The upstream in EPON adopts TDMA/TDM technology, and it is necessary to know the exact RTT(Round Trip Time), the principle of RTT measurement (ranging) and RTT compensation are introduced. We use Xilinx FPGA Spartan^II chip series to realize ranging function module, the main idea of implementation is given in this paper, and this can be used for further study of hardware implementation.

Citation Download Citation

Xueyi Li, Wei-ping Liu, Liming Zheng, Hong-bin Huang, Junbin Fang, and Shun-er Chen "Study and implementation using FPGA of RTT in EPON", Proc. SPIE 5626, Network Architectures, Management, and Applications II, (8 February 2005); https://doi.org/10.1117/12.575388

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