Inline sidewall angle monitoring of memory capacitor profiles

Ben M. Rathsack; Scott G. Bushman; Francis G. Celii; Stephen F. Ayres; Roman Kris

doi:10.1117/12.600750

10 May 2005 Inline sidewall angle monitoring of memory capacitor profiles

Ben M. Rathsack, Scott G. Bushman, Francis G. Celii, Stephen F. Ayres, Roman Kris

Proceedings Volume 5752, Metrology, Inspection, and Process Control for Microlithography XIX; (2005) https://doi.org/10.1117/12.600750
Event: Microlithography 2005, 2005, San Jose, California, United States

Abstract

The integration of embedded ferroelectric random access memory (FRAM) into a standard CMOS flow requires significant control and characterization of the patterned capacitor sidewall angle. The electrical functionality of the FRAM capacitor is highly dependent on the post-etch sidewall characteristics of the TiAlN hardmask and Ir/PZT/Ir capacitor film stack. In this study, we explored various options for determining the sidewall profile of these capacitors including scanning electron microscope (SEM), atomic force microscopy (AFM) and scatterometry. A series of capacitor samples with ranges of sidewall slopes from 60 degrees to 80 degrees was generated to test each measuring technique's robustness. All of the techniques demonstrated relatively accurate sidewall angle measurements of the high-angle capacitor profiles relative to cross-section SEMs. However, the CD SEM had difficulty identifying the top edge of the low-angle capacitor samples due to the large amount of profile roughness, which induced a large measurement error range. Additional optimization is required to improve the CD SEM's precision, before it would be a viable in-line monitor for the FRAM process. The AFM provided good accuracy and precision on the high-angle capacitor profiles, but the tip size limited the measurements to spaces larger than 120 nm. Furthermore, the AFM had a long move-acquire-measure (MAM) time of 5 minutes/site, which limited its throughput as an inline monitor. The scatterometer predicted bottom-stack sidewall angle measurements (2 trapezoid model) that were consistent with the cross-section SEMs, and it produced the lowest across wafer sidewall angle range. It also had the fastest MAM time of 5 seconds/site compared to the other techniques. However, it was difficult to generate an accurate scatterometry model due to the complex optical film stack that incorporated low surface reflectivity and higher surface roughness. While each technique had limitations, scatterometry appeared to be the most capable of inline sidewall angle monitoring.

Citation Download Citation

Ben M. Rathsack, Scott G. Bushman, Francis G. Celii, Stephen F. Ayres, and Roman Kris "Inline sidewall angle monitoring of memory capacitor profiles", Proc. SPIE 5752, Metrology, Inspection, and Process Control for Microlithography XIX, (10 May 2005); https://doi.org/10.1117/12.600750

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