Monolithically fabricated germanium-on-SOI photodetector and Si CMOS circuit for integrated photonic applications

Kah-Wee Ang; Tsung-Yang Liow; Ming-Bin Yu; Qing Fang; Junfeng Song; Guo Qiang Lo; Dim-Lee Kwong

doi:10.1117/12.854101

17 May 2010 Monolithically fabricated germanium-on-SOI photodetector and Si CMOS circuit for integrated photonic applications

Kah-Wee Ang, Tsung-Yang Liow, Ming-Bin Yu, Qing Fang, Junfeng Song, Guo Qiang Lo, Dim-Lee Kwong

Author Affiliations +

Proceedings Volume 7719, Silicon Photonics and Photonic Integrated Circuits II; 77190T (2010) https://doi.org/10.1117/12.854101
Event: SPIE Photonics Europe, 2010, Brussels, Belgium

Abstract

In this paper, we report our design and fabrication approach towards realizing a monolithic integration of Ge photodetector and Si CMOS circuits on common SOI platform for integrated photonic applications. The approach, based on the Ge-on-SOI technology, enables the realization of high sensitivity and low noise photodetector that is capable of performing efficient optical-to-electrical encoding in the near-infrared wavelengths regime. When operated at a bias of -1.0V, a vertical PIN detector achieved a lower I_dark of ~0.57μA as compared to a lateral PIN detector, a value that is below the typical ~1μA upper limit acceptable for high speed receiver design. Very high responsivity of ~0.92A/W was obtained in both detector designs for a wavelength of 1550nm, which corresponds to a quantum efficiency of ~73%. Impulse response measurements showed that a vertical PIN photodetector gives rise to a smaller FWHM of ~24.4ps, which corresponds to a -3dB bandwidth of ~11.3GHz where RC time delay is known to be the dominant factor limiting the speed performance. Eye patterns (PRBS 2⁷-1) measurement further confirms the achievement of high speed and low noise photodetection at a bit-rate of 8.5Gb/s. In addition, we evaluate the DC characteristics of the monolithically fabricated Si CMOS inverter circuit. Excellent transfer and output characteristics were achieved by the integrated CMOS inverter circuits in addition to the well behaved logic functions. We also assess the impact of the additional thermal budget introduced by the Ge epitaxy growth on the threshold voltage variation of the short channel CMOS transistors and discuss the issues and potential for the seamless integration of electronic and photonic integrated circuits.

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Kah-Wee Ang, Tsung-Yang Liow, Ming-Bin Yu, Qing Fang, Junfeng Song, Guo Qiang Lo, and Dim-Lee Kwong "Monolithically fabricated germanium-on-SOI photodetector and Si CMOS circuit for integrated photonic applications", Proc. SPIE 7719, Silicon Photonics and Photonic Integrated Circuits II, 77190T (17 May 2010); https://doi.org/10.1117/12.854101

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KEYWORDS

Germanium

Sensors

Photodetectors

Silicon

Laser phosphor displays

Waveguides

Transistors

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