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The importance and complexity of interconnections in computers increase tremendously if one considers the von Neumann digital computer in connection with parallel computers with many tightly coupled processors. There is an indication that processing and interconnecting aspects will merge in future computer architecture. Parallel computers are able to perform a myriad of processing tasks such as "computational seismics", chemical reaction and aerodynamic simulation, dynamic imaging and robot vision. Such systems, comprised of many tightly coupled processors can meet the computational performance goals, required for these processing tasks. However a major problem is the construction of a suitable interconnection network which provides fast and flexible interprocessor communications at a reasonable cost. The cost-effectiveness of any arbitrary network design is governed by factors such as the number of processors applied, the computational tasks to be performed, the required speed of the interprocessor data transfers, the complexity of the actual hardware topology of the network and any cost constraints on its construction. The Delft Parallel Processor [DPP], which has been operational since 1981, is a modest size MIMD computer with a powerful interprocessor interconnection topology. (MIMD = Multiple-Instruction stream, Multiple-Data stream). In the DPP architecture, multiple data streams are realized by means of plural parallel data channels (one per data stream), with a branch-off per channel to each Processing Element [PE] to fetch the data on which to operate. A fast and efficient exchange of information within the DPP is performed by this 'full interconnectivity' Multiple-Broadcast [MB] interconnection topology. In the case of many processors, this MB interconnect has to be realized by means of Optical Interconnects [01's], to validate at several levels the quality and flexibility of communication systems for both interconnection topologies and data flow protocols. Conventional Electrical Interconnects [Us] and switching technologies are now becoming an insuperable bottleneck at several levels. The implementation of high speed, multi-pin, silicon and GaAs VLSI/VHSI circuits is one extreme; the choice of a massively reconfigurable parallel interconnection scheme is another. Optimum routing methods are hard to define. The application of wired Ors for the board-to-board interconnects and Local Area Networks [LAN's] is the most promising. Structured optical waveguide techniques, image mapping optics, optical starcouplers and free space holographic for the inner- and interchip communication may be the future, although coupling between opto-electronic components and/or waveguides still requires critical alignment.
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