Presentation + Paper
30 August 2019 Leveraging wafer-level manufacturing process limitations to increase large-scale fused silica microlens array uniformity
Author Affiliations +
Abstract
The wafer-level production of Fused Silica microlens arrays is limited by systematic process non-uniformities. The common molten resist-reflow process with subsequent dry-etching allows for manufacturing of microlens arrays on 200 mm wafers. A thorough process review yielded one free parameter. By switching from the geometrical lens description via radius of curvature and conic constant to a functional assessment via the optical design figure of merit we can describe microlens via their optical quality for the intended application with one parameter for a wide variety of cases. Leveraging these points we show improvements on the uniformity of microlens arrays by a factor of 2 for Fused Silica microlens arrays bigger than 100 mm by 100 mm.
Conference Presentation
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Raoul Kirner, Jeremy Béguelin, Wilfried Noell, Martin Eisner, Toralf Scharf, and Reinhard Voelkel "Leveraging wafer-level manufacturing process limitations to increase large-scale fused silica microlens array uniformity", Proc. SPIE 11103, Optical Modeling and System Alignment, 111030A (30 August 2019); https://doi.org/10.1117/12.2529195
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KEYWORDS
Microlens

Picture Archiving and Communication System

Microlens array

Wafer-level optics

Manufacturing

Optics manufacturing

Reactive ion etching

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