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14 February 2020 A real-time FPGA-based architecture of improved ORB
Zizhao Xie, Yu Wang, Zhang Yan, Jianhui Wang, Sheng Zhong
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Proceedings Volume 11431, MIPPR 2019: Parallel Processing of Images and Optimization Techniques; and Medical Imaging; 1143102 (2020) https://doi.org/10.1117/12.2538037
Event: Eleventh International Symposium on Multispectral Image Processing and Pattern Recognition (MIPPR2019), 2019, Wuhan, China
Abstract
This paper proposes a real-time FPGA-based architecture of improved ORB. It proposes a strategy of redistribution of ORB feature points, which solves the problem of sorting FAST points of the whole image by response score. Besides, a strategy for offline generation of rBrief point pair patterns is proposed, which avoids online rotation of neighborhood pixels of feature points. These two strategies greatly reduce the resource consumption and processing clock cycles of the whole architecture. What’s more, the data throughput of the feature extraction step and feature description step is maximized, and finally a completely pipeline architecture is obtained. Due to the tips for parallel processing and resource reuse, the hardware implementation of the proposed architecture costs very few resources and processing cycles. The experimental results show that this architecture can detect feature and extract descriptor from video streams of 1280x720 resolution at 161 frames per second (161 fps), and the extracted ORB features perform well.
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Zizhao Xie, Yu Wang, Zhang Yan, Jianhui Wang, and Sheng Zhong "A real-time FPGA-based architecture of improved ORB", Proc. SPIE 11431, MIPPR 2019: Parallel Processing of Images and Optimization Techniques; and Medical Imaging, 1143102 (14 February 2020); https://doi.org/10.1117/12.2538037
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KEYWORDS
Feature extraction
Image processing
Field programmable gate arrays
Video
Computer architecture
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