Design of 25-32 GHz low noise amplifier in a 55nm CMOS silicon-on-insulator technology

Jie Li; Kai Men; Bo Zhang

doi:10.1117/12.3030532

5 June 2024 Design of 25-32 GHz low noise amplifier in a 55nm CMOS silicon-on-insulator technology

Jie Li, Kai Men, Bo Zhang

Proceedings Volume 13163, Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024); 1316307 (2024) https://doi.org/10.1117/12.3030532
Event: International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024), 2024, Xi'an, China

Abstract

Low noise amplifiers (LNA) play an important role in modern millimeter wave systems. This work presents a LNA designed in a 55nm complementary metal-oxide-semiconductor (CMOS) silicon-on-insulator (SOI) technology. The LNA operates in the Ka-band frequency range of 25-32 GHz. The LNA employs a two-stage cascode architecture with wideband matching network. It achieves a gain range of 17.2-17.7 dB, a noise figure (NF) range of 2.6-2.9 dB and an input 1 dB compression point (IP1dB) of -12 dBm with a dc power consumption of only 29 mW.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

Citation Download Citation

Jie Li, Kai Men, and Bo Zhang "Design of 25-32 GHz low noise amplifier in a 55nm CMOS silicon-on-insulator technology", Proc. SPIE 13163, Fourth International Conference on Mechanical, Electronics, and Electrical and Automation Control (METMS 2024), 1316307 (5 June 2024); https://doi.org/10.1117/12.3030532

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