Paper
5 July 2024 Study on data acquisition and storage with nand flash technique in spacecraft
Fan Mo, Shaolin Wang, Chuang Wang, Fengfeng Ding
Author Affiliations +
Proceedings Volume 13184, Third International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024); 1318449 (2024) https://doi.org/10.1117/12.3033124
Event: 3rd International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024), 2024, Kuala Lumpur, Malaysia
Abstract
For the general application in spacecraft, a proper partition and storage structure is designed. On the basis of it, a novel proper wiring balance and invalid block management algorithm for Nand Flash is developed, which greatly reduce the logical elements requirement for Nand Flash control in FPGA. With the algorithm an common anti-fuse FPGA with 70,000 gates can implement the function of Nand Flash management, which enhanced the reliability. Considered maintainability the flexible logic modules are implemented by software. A data acquisition Device using Nand Flash storage is presented. This paper describes functional structure including software structure and FPGA logic structure of this Device, division and storage structure, the novel proper wiring balance and invalid block management algorithm for Nand Flash, radiation hardened measure, hardware resources requirement. Ideas and strategies of the design are disclosed and a more universal model of key algorithm is presented.
(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.
Fan Mo, Shaolin Wang, Chuang Wang, and Fengfeng Ding "Study on data acquisition and storage with nand flash technique in spacecraft", Proc. SPIE 13184, Third International Conference on Electronic Information Engineering and Data Processing (EIEDP 2024), 1318449 (5 July 2024); https://doi.org/10.1117/12.3033124
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Data storage

Data acquisition

Field programmable gate arrays

Logic

Computer programming

Computing systems

Error control coding

Back to Top