Paper
1 January 1992 Integrated deposition of TiN barrier layers in cluster tools
J. P. Seidel, W. Wachter, William M. Triggs, Robert P. Hall
Author Affiliations +
Proceedings Volume 1594, Process Module Metrology, Control and Clustering; (1992) https://doi.org/10.1117/12.56619
Event: Microelectronic Processing Integration, 1991, San Jose, CA, United States
Abstract
Ti and TiN layers have several applications in VLSI devices as anti reflective coatings, step coverage enhancement, adhesion layers for blanket tungsten CVD, and with increasing importance, as diffusion barriers. This work describes the development of a simple and reproducible reactive sputtering process for TiN, using a BALZERS ARQ 150 DC planar magnetron with a multichamber process system. Resistivity and uniformity, deposition rate, stoichiometry and stress, and their dependence upon sputter source power, sputtering pressure, argon to nitrogen ratio, and substrate temperature were investigated. A process window is specified with resistivity values below 70|lohm-cm, film uniformity better than ±5% over a 200mm wafer, deposition rates up to 100 nm/minute, and residual stress below 5 x 109 dynes/cm2.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
J. P. Seidel, W. Wachter, William M. Triggs, and Robert P. Hall "Integrated deposition of TiN barrier layers in cluster tools", Proc. SPIE 1594, Process Module Metrology, Control and Clustering, (1 January 1992); https://doi.org/10.1117/12.56619
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KEYWORDS
Tin

Semiconducting wafers

Process control

Sputter deposition

Metals

Nitrogen

Aluminum

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