Paper
9 September 1994 Manufacturing issues in copper chemical vapor deposition processes
Tue Nguyen, Lynn R. Allen, Sheng Teng Hsu
Author Affiliations +
Abstract
The use of copper chemical vapor deposition and plasma etch to form interconnects for VLSI circuits have been investigated. Deposition results to date show reliable deposition of copper with bulk-like resistivity and good deposition uniformity. The effect of substrate temperature on deposition was investigated. The issues of precursor consistency and effects of contamination in the delivery system were also addressed. Feasibility of plasma etch has been investigated. Preliminary results show that the use of hard masks and wafer temperature above 160 degree(s)C are necessary. The etch chemistry used is chlorine based, adapted from an aluminum etch process. Results show anisotropic etch with some notching which is currently being addressed in further development efforts.
© (1994) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tue Nguyen, Lynn R. Allen, and Sheng Teng Hsu "Manufacturing issues in copper chemical vapor deposition processes", Proc. SPIE 2335, Microelectronics Technology and Process Integration, (9 September 1994); https://doi.org/10.1117/12.186048
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Cited by 2 scholarly publications.
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KEYWORDS
Copper

Etching

Chemical vapor deposition

Semiconducting wafers

Contamination

Plasma etching

Plasma

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