Influence of intermetal dielectric thickness on overlay mark size variation in photolithography

Suk-Joo Lee; Ji-Yong Yoo; Young-Chang Kim; Hak Kim; Jeong-Lim Nam; U-In Chung; Geung-Won Kang; Woo-Sung Han

doi:10.1117/12.386472

2 June 2000 Influence of intermetal dielectric thickness on overlay mark size variation in photolithography

Suk-Joo Lee, Ji-Yong Yoo, Young-Chang Kim, Hak Kim, Jeong-Lim Nam, U-In Chung, Geung-Won Kang, Woo-Sung Han

Author Affiliations +

Proceedings Volume 3998, Metrology, Inspection, and Process Control for Microlithography XIV; (2000) https://doi.org/10.1117/12.386472
Event: Microlithography 2000, 2000, Santa Clara, CA, United States

Abstract

The pattern size variation (PSV) and pattern size deviation (PSD) dependency on inter-metal dielectrics (IMD) thickness is studied to improve overlay performance. A new model is introduced to explain the cause of such a large PSD and PSV(> 1 micrometer), which are frequently encountered in real process followed by chemical mechanical polishing (CMP) process. Abnormal PSD depends more on focus and substrate structure than on dose. The IMD as thick as 4 micrometer gives rise to a large PSD by 1 micrometer for a 3 micrometer overlay mark. To solve such large PSD and PSV, two solutions are suggested: application of anti-reflective layer (ARL) beneath the IMD or placement of a reflective layer in the middle of IMD. With this improvement, the failure rate of the overlay mark detection decreased from approximately 90% to less than approximately 2%.

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Suk-Joo Lee, Ji-Yong Yoo, Young-Chang Kim, Hak Kim, Jeong-Lim Nam, U-In Chung, Geung-Won Kang, and Woo-Sung Han "Influence of intermetal dielectric thickness on overlay mark size variation in photolithography", Proc. SPIE 3998, Metrology, Inspection, and Process Control for Microlithography XIV, (2 June 2000); https://doi.org/10.1117/12.386472

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KEYWORDS

Semiconducting wafers

Chemical mechanical planarization

Overlay metrology

Oxides

Reflectivity

Dielectrics

Optical lithography

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