Over the last decade the design and reactive ion etch based fabrication of a range of innovative Si and SiO2 MEMS based optical transmission devices has significantly increased. These devices rely on the principle that the data contained within the transmitted light retains its integrity, hence it is important that the reflected light does not suffer interference and losses from the surface used to direct it. To achieve this, reflecting surfaces need to be as smooth as possible, without compromising processing etch rate, sidewall profile and cross-wafer uniformity. This paper describes the results of recent hardware and process development trials using time multiplexed silicon ICP etch processing (STS ASE) at reduced switching times to provide vertical sidewalls at less than 10nm RMS roughness. For dielectric etch optical applications requiring high aspect ratio (>10:1) or through wafer depth capability (400mm at 1.2μm/min), we also report the results of process development trials using STS Advanced Oxide Etch (AOE) technology.
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