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Lithographic processes for printing device structures on integrated circuits (ICs) are the fundamental technology behind Moore's law. Next-generation techniques like maskless lithography or ML2 have the advantage that the long, tedious and expensive process of fabricating a unique mask for the manufactured chip is not necessary. However, there are some rather daunting prblems with establishing ML2 as a viable commercial technology. The data rate necessary for ML2 to be competitive in manufacturing is not feasible with technology in the near future. There is also doubt that the competing technologies for the writing mechanisms and corresponding photoresist (or analogous medium) will be able to accurately produce the desired patterns necessary to produce multi-layer semiconductor devices. In this work, we model the maskless printing system from a signal processing point of view, utilizing image processing algorithms and concepts to study the effects of various real-world constraints and their implications for a ML2 system. The ML2 elements are discrete devices, and it is doubtful that their motion can be controlled to the level where a one-for-one element to exposed pixel relationship is allowable. Some level of sub-element resolution can be achieved with gray scale levels, but with the highly integrated manufacturing practices required to achieve massive parallelism, the most effective elements will be simple on-ofrf switches that fire a fixed level of energy at the target medium. Consequently gray-scale level devidces are likely not an option. Another problem with highly integrated manufacturing methods is device uniformity. Consequently, we analyze the redundant scanning array concept (RSA) conceived by Berglund et al. which can defeat many of these problems. We determine some basic equations governing its application and we focus on applying the technique to an array of low-energy electron emitters. Using the results of Monte Carlo simulations on electron beam profiles, we determine an empirical "impulse response" for each emitter and thus determine how each emission manifests itself in the final printed lithographic pattern. We apply methods to determine the best printable image for a variety of RSA geometries, including different levels of redundancy and achieved printer element spacing. We use concepts of total printing error to help quantify the printing quality. Through simulation, we report the effects of dead or missing elements. We also present some error analysis to account for non-ideal array positioning. Ultimately, we believe that printing quality should be the grounds for determining the necessary data rates to support competitive manufacturing with ML2 devices.
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