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In this work results of investigation of technological processes of gate structure formation for devices with less then 100 nm channel length were presented. Gate structures with high-k (YSZ) gate dielectric and silicide (CoSi2) electrodes were analyzed. Influence of silicide process parameters on homogeneity of silicide formed in narrow trenches were considered.
I. A. Horin,A. D. Krivospitsky,A. A. Orlikovsky,A. E. Rogozhin, andA. G. Vasiliev
"Silicide/high-k dielectric structures for nanotransistor gates", Proc. SPIE 6260, Micro- and Nanoelectronics 2005, 62600G (10 June 2006); https://doi.org/10.1117/12.677066
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I. A. Horin, A. D. Krivospitsky, A. A. Orlikovsky, A. E. Rogozhin, A. G. Vasiliev, "Silicide/high-k dielectric structures for nanotransistor gates," Proc. SPIE 6260, Micro- and Nanoelectronics 2005, 62600G (10 June 2006); https://doi.org/10.1117/12.677066