Advanced method to monitor design-process marginality for 65nm node and beyond

Crockett Huang; Chris Young; Hermes Liu; S. F. Tzou; David Tsui; Ellis Chang

doi:10.1117/12.772131

16 April 2008 Advanced method to monitor design-process marginality for 65nm node and beyond

Crockett Huang, Chris Young, Hermes Liu, S. F. Tzou, David Tsui, Ellis Chang

Proceedings Volume 6922, Metrology, Inspection, and Process Control for Microlithography XXII; 69222D (2008) https://doi.org/10.1117/12.772131
Event: SPIE Advanced Lithography, 2008, San Jose, California, United States

Abstract

We proposed a novel method (DBB: Designed Based Binning) by using design and defect inspection information to detect marginal design features. This method was used to identify a pattern failure problem (hammer head) which occurred during production early ramp (65 nm device). The traditional approach could not detect this hammerhead problem due to the intermittent nature and low defect count. This problem was identified by DBB methodology which showed problem root cause as a combination of lithography process conditions drift and marginal OPC issues. This use case proved that by using DBB to identify weak pattern features, it provides a common platform for designer, OPC and process engineer to communicate and identify design related problems faster. This method has helped integration engineer shorten process development time, supported product engineer to ramp new product faster and enabled defect engineer to detect excursion earlier. Overall, advanced manufacturing fab will achieve higher yield by adopting this.

Citation Download Citation

Crockett Huang, Chris Young, Hermes Liu, S. F. Tzou, David Tsui, and Ellis Chang "Advanced method to monitor design-process marginality for 65nm node and beyond", Proc. SPIE 6922, Metrology, Inspection, and Process Control for Microlithography XXII, 69222D (16 April 2008); https://doi.org/10.1117/12.772131

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