An FPGA-based histogram equalization implementation

Yang Li; Sheng Zhong; Bo Wang; Luxin Yan; Tao Liu

doi:10.1117/12.832927

30 October 2009 An FPGA-based histogram equalization implementation

Yang Li, Sheng Zhong, Bo Wang, Luxin Yan, Tao Liu

Proceedings Volume 7497, MIPPR 2009: Medical Imaging, Parallel Processing of Images, and Optimization Techniques; 74970R (2009) https://doi.org/10.1117/12.832927
Event: Sixth International Symposium on Multispectral Image Processing and Pattern Recognition, 2009, Yichang, China

Abstract

Image histogram equalization technology is always a very important basic processing technology in image process field. In infrared image processing system, low contrast and shortage of gray levels often make it very difficult to observe and recognize targets. In this situation, Real-time image histogram equalization technology is often used to enhance infrared image contrast, improve infrared image quality and ameliorate image processing system performance. In embedded system, when real-time image histogram equalization is required, it is very difficult for the typical design methods by using general purpose DSP or MCU to meet the real-time requirement. It is a very good choice to choose FPGA hardware logic to implement image histogram equalization. Here in this paper, we introduce an FPGA based image histogram equalization implementation in detail which can meet real-time requirement very well.

Citation Download Citation

Yang Li, Sheng Zhong, Bo Wang, Luxin Yan, and Tao Liu "An FPGA-based histogram equalization implementation", Proc. SPIE 7497, MIPPR 2009: Medical Imaging, Parallel Processing of Images, and Optimization Techniques, 74970R (30 October 2009); https://doi.org/10.1117/12.832927

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KEYWORDS

Image processing

Field programmable gate arrays

Image enhancement

Image quality

Infrared imaging

Infrared radiation

Clocks

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