Paper
8 January 2013 Noise characteristics of nanoscaled SOI MOSFETs
Author Affiliations +
Proceedings Volume 8700, International Conference Micro- and Nano-Electronics 2012; 87000N (2013) https://doi.org/10.1117/12.2017358
Event: International Conference on Micro-and Nano-Electronics 2012, 2012, Zvenlgorod, Russian Federation
Abstract
The low-frequency noise behavior of nanoscaled fully-depleted silicon-on insulator (SOI) finFETs is investigated and the perspectives of the noise method as a non-destructive diagnostic tool are revealed. The analysis of the (1/f)γ McWhorter noise observed at zero back-gate voltage showed that the trap concentration Not appears to be lower in the case of devices with HfSiON/SiO2 gate dielectric with the uniaxial strain in the inversion channel while the implementation of the HfO2/SiO2 gate stack and the biaxial strain tend to increase the value of Not. The analysis of the back-gate-induced (BGI) and linear kink effect (LKE) Lorentzian noise observed when the back interface is biased in accumulation allowed to estimate the values proportional to equivalent capacitance Ceq. Their front-gate voltage dependencies appear to be different for the devices with HfSiON/SiO2 and HfO2/SiO2 gate dielectric. Also the values proportional to density of the electron-valence-band tunneling currents jEVB were found for the devices studied. The influence of the strain-inducing techniques and gate dielectric type on the values discussed is revealed.
© (2013) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Nataliya Lukyanchikova, Nikolay Garbar, Valeriya Kudina, Alexander Smolanka, Eddy Simoen, and Cor Claeys "Noise characteristics of nanoscaled SOI MOSFETs", Proc. SPIE 8700, International Conference Micro- and Nano-Electronics 2012, 87000N (8 January 2013); https://doi.org/10.1117/12.2017358
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KEYWORDS
Dielectrics

Oxides

Field effect transistors

Capacitance

Silica

Silicon

Solids

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