Low loss SiN photonic integrated circuits: from prototype to volume

Michael Geiselmann

doi:10.1117/12.2647172

17 March 2023 Low loss SiN photonic integrated circuits: from prototype to volume

Michael Geiselmann

Author Affiliations +

Proceedings Volume PC12425, Smart Photonic and Optoelectronic Integrated Circuits 2023; PC1242508 (2023) https://doi.org/10.1117/12.2647172
Event: SPIE OPTO, 2023, San Francisco, California, United States

Abstract

In this talk, we present progress on scaling the fabrication of thick film silicon nitride photonics integrated circuits to volume and discuss the advantages of low loss photonic integrated circuits. We will present the LIGENTEC offering for low loss silicon nitride PICs for application such as quantum, LiDAR and sensing. Options of active integration, such as LNOI are discussed. The offering includes fast R&D cycles in low volume PIC fabrication though multi-project wafer runs to high volume PIC fabrication in an automotive qualified CMOS line.

Conference Presentation

Citation Download Citation

Michael Geiselmann "Low loss SiN photonic integrated circuits: from prototype to volume", Proc. SPIE PC12425, Smart Photonic and Optoelectronic Integrated Circuits 2023, PC1242508 (17 March 2023); https://doi.org/10.1117/12.2647172

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