Mr. Chan Hee Kwak Profile

Chan Hee Kwak

Application Manager at Applied Materials Korea Ltd

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Publications (4)

Proceedings Article | 10 April 2024 Presentation + Paper

The importance of less damaged and surface sensitive metrology to identify true EUV process monitoring

GwangSeob Lim, EunKyeong Jang, BoGyeong Choi, Jihyun An, MinWoo Kang, Sunghun Lim, Jong-Hoi Cho, Daiyoung Mun, Ran Alkoken, Tal Vol, Yana Branzburg, You Jin Kim, Jeong Ho Yeo, KyungJae Choi, Kyeongju Han, Sujin Lim, Jaemin Cho, JaeEun Lim, WooSung Jung, Chanhee Kwak, Hyeon Sang Shin

Proceedings Volume 12955, 1295517 (2024) https://doi.org/10.1117/12.3012913

KEYWORDS: Shrinkage, Etching, Extreme ultraviolet, Photoresist materials, Metrology, Semiconducting wafers, Extreme ultraviolet lithography, Photoacid generators, Stochastic processes, Critical dimension metrology

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The adoption of EUV technology in DRAM fabrication is primarily driven by the pursuit of higher device densities, improved performance, and increased energy efficiency. EUV's shorter wavelength (13.5 nm) enables enhanced resolution and finer patterning, enabling the production of smaller memory cells with reduced feature sizes. As the target patterning size is becoming sub-10nm, line edge/width roughness (LER/LWR) is the centerpiece in controlling uniformity of pattern going through the lithography process. Accordingly, it is essential to figure out the dedicated CDSEM metrology method for EUV step without any image quality degradation, charging issue, and e-beam damage that can hinder accurate diagnosis of the real process status. Empirically, it is highly difficult to predict the best metrology condition that fits to the specific resist material, dimension, and geometry due to complex stochastic effect caused by secondary electron inside photoresist (PR) material. Here we represent experimental results of PR damage caused by electron beam irradiation with different landing energy for both line and space (LS) pattern and contact hole (CH) pattern. The results enabled us to define the effect of the landing energy and geometry of pattern on the critical dimension (CD) and roughness. We examined electron irradiation induced damage by comparing etch bias of fresh location and e-beam exposed location on etch process step to fully understand shrinkage and deformation behavior. For the roughness measurement of CH pattern, we adopted new metric which enables us to quantify contact edge roughness and shape of contact. Utilizing various metrics, it was possible to observe damage on the process, which was not observed only by CD changes, and it was confirmed that the primary beam with low landing energy could be used to not only reduce damage but also enhance surface sensitivity of metrology without bias which is crucial for stochastic effect monitoring on the EUV process.

Proceedings Article | 10 April 2024 Presentation + Paper

Real time EPE measurement as a yield correlated metrology on advanced DRAM nodes

Taekwon Jee, Joonsang You, Hong-Goo Lee, Seungmo Hong, Jonghoi Cho, Taeseop Lee, Jong-hyun Seo, Michael Shifrin, Ronnie Porat, Amir Rosen, Rohit Kumar Singh, Jeong-Ho Yeo, Younghoon Kim, Jun Park, Byung-Jo Lim, Chan-Hee Kwak

Proceedings Volume 12955, 129550P (2024) https://doi.org/10.1117/12.3010813

KEYWORDS: Overlay metrology, Critical dimension metrology, Metrology, Semiconducting wafers, Stochastic processes, Time metrology, Design, Data modeling, Process control, Optical lithography

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The Edge Placement Error (EPE) is growing concerns due to the complexity increases of process variation as the design rule shrinkage of DRAM device. The EPE is a well-accepted metric which can be derived from CD, Overlay and LER measurements from more than patterning layers that concerned. Therefore, real time EPE measurement becomes a major factor to monitor and control the pattern fidelity. The pattern fidelity could be found from the edge placement measurement as a distance to design intent as possible without pattern defects. However, the traditional application of photolithography and etch biases according to a design rule or model for identifying pattern fidelity has inherent low TMU, multiple non consistence data sources and time-consuming off-line analysis. In previous works, we demonstrated the innovative e-Beam EPE metrology application using All-In-One (AIO) methodology to comply the required Total Measurement Uncertainty (TMU) and Time to Result (TTR) on the advanced DRAM nodes. AIO imaging and analysis methodology that deconvolute CD, overlay and relevant EPE metrics from a single see-through image is the most important differentiation for this EPE analysis approach. The in-cell direct EPE measurement with All-In-One (AIO) imaging and massive sampling demonstrates the better process controls and monitoring from the co-optimization of multiple control parameters and direct measurement of the yield relevant metrics. In this paper, we would like to show a couple of EPE monitoring use cases which shows good correlation to the final yield map through the massive and multi-layer measurements. Especially, it is expected that the EPE component which measures the edge-to-edge distance between different features of multi-layers can be a useful indicator for predicting yield along with CD and overlay. To investigate the local and random variabilities, which local stochastic effects are contained, we also studied the degree of yield prediction of the EPE component with increasing number of measurement sites in local area. It is proposed that using a large amount of measurement sites allows to improve the yield prediction accuracy to a certain extent, which means the local stochastic effects can be effectively analyzed with the use of massive metrology approach. In addition, from the prediction accuracy study using EPE model-based machine learning, we proved that the EPE is sufficiently sensitive indicator to capture potential yield-loss problems in normal wafer, as well. Therefore, in-line EPE monitoring using AIO metrology enables the root-cause analysis of patterning weak points and provides a better process monitoring/correction solution to enable faster advanced DRAM node development ramp and high-volume stability.

Proceedings Article | 27 April 2023 Poster + Paper

Tracing optimized condition for electron beam metrology of EUV photoresist pattern using low landing energy

Woosung Jung, Jong-Hoi Cho, SungHun Lim, TaeSeop Lee, DaeYoung Choi, Jong-Hyun Seo, SeungHyun Lee, JunKyoung Lee, You Jin Kim, Jeong Ho Yeo, Alex Brikker, Roi Meir, Ran Alkoken, Kyeongju Han, Sujin Lim, KyungJae Choi, Chanhee Kwak, Hyeon Sang Shin

Proceedings Volume 12496, 1249622 (2023) https://doi.org/10.1117/12.2660118

KEYWORDS: Shrinkage, Photoresist materials, Extreme ultraviolet lithography, Critical dimension metrology, Photoacid generators, Metrology, Extreme ultraviolet, Etching, Electron beams, Outgassing

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Proceedings Article | 27 April 2023 Poster + Paper

Tracing optimized condition for electron beam metrology of EUV photoresist pattern using low-landing energy

Proceedings Volume 12496, 124963E (2023) https://doi.org/10.1117/12.2660114

KEYWORDS: Shrinkage, Photoresist materials, Extreme ultraviolet lithography, Critical dimension metrology, Photoacid generators, Metrology, Electron beams, Etching, Outgassing, Lithography

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