The Double Patterning lithography (DPL) process is a well known method to overcome the k1 limit below 0.25, but the pattern final performance (OVL/CD) get more sensitive with the initial core CD uniformity, one of the main factors is across wafer CD uniformity control. Previous improvements applying scanner dose or PEB temperature multi-zone control, the others use the vacuum PEB plate design. In this study, we adopt various DPL sacrificial layers to modify wafer warpage level, it can adjust a suitable wafer warpage profile. By this method, we can achieve 30% CD uniformity improvement without the scanner dose/ PEB multi-zone heating compensation,
Controlling overlay residuals to the lowest possible levels is critical for high yielding mass production success
and is one of the most pressing challenges for lithographers. In this paper, the authors will show how the use of certain
systematic diagnostic and analysis tools combined with a source of variance methodology can allow users to promptly
separate the overlay sources of error into different contributors and quickly make the proper corrections. This
methodology with the analysis tools provide a turnkey solution to help process and equipment engineers take fast
decisions and act quickly to overcome these overlay challenges, which is one of the key contributing factors to staying
ahead.
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