An extreme ultraviolet (EUV) pellicle is employed to prevent contamination on a EUV mask. The EUV pellicle, a high-priced membrane, gets contaminated during both the fabrication process and exposure. The lifetime of the pellicle can be extended by the removal of these contaminants. In this study, a particle removal technique for the EUV pellicle was developed. A functionalized atomic force microscopy (AFM) probe and programable particle contamination system were developed for particle removal and evaluation of the technique, respectively. The particle was removed with a pinpoint technique and the inherent vibration of the free-standing membrane was suppressed during the process. The process window of the proposed pinpoint cleaning technique was investigated to ensure damage-free particle removal and the nanomanipulated functionalized probe resulted in efficient particle removal from the pellicle surface without damage.
Currently, we are supplying defect-free EUV mask for device development. This was one of the biggest challenges in the implementation of EUV lithography for high volume manufacturing (HVM). It became possible to hide all multi-layer defects by using defect avoidance technique through improvement of blank mask defectivity and development of actinic blank inspection tool. In addition, EUV pellicle is also considered as a requisite to guarantee predictable yield. Both development of mask shop tools and preparation of EUV scanner for pellicle are going well. However, still membrane needs to be much improved in terms of transmittance and robustness for HVM. At the conference, EUV mask readiness for HVM will be discussed including blank defect improvement, preparation of actinic tools and pellicle development.
We introduce an extreme ultraviolet lithography (EUVL) mask defect review system (EMDRS) which has been developing in SAMUSNG. It applies a stand-alone high harmonic generation (HHG) EUV source as well as simple EUV optics consisting of a folding mirror and a zoneplate. The EMDRS has been continuously updated and utilized for various applications regarding defect printability in EUVL. One of the main roles of the EMDRS is to verify either mask repair or mask defect avoidance (MDA) by actinic reviews of defect images before and after the process. Using the MDA, small phase defects could be hidden below absorber patterns, but it is very challenging in case of layouts with high density patterns. The EMDRS clearly verify the success of the MDA while conventional SEM could not detect the images. In addition, we emulate images of the sub-resolution assist features (SRAFs) by the EMDRS and compared them with the wafer exposure results.
A new PSM using high transmittance is developed to overcome patterning process limits in ArF immersion lithography. We optimized mask structure, materials, and film thicknesses for patterning process. A new material for phase-shifter is applied to the HT-PSM to exhibit higher transmittance in ArF wavelengths and the thickness of the new material is thinner than that of the conventional 6% phase-shifter (MoSiON). A new blank structure using a MoSi shading layer with double Cr hardmasks (HM) is developed and suggested for the HTPSM process. Double HM blank stacks enable the HT-PSM to adopt thin PR process for resolution enhancement in mask process. The first Cr on the MoSi is utilized as a HM to etch MoSi shading layer, an adhesion layer for PR process, and also a capping layer to protect blind area during MoSi and phase-shifter etching. In contrast, the role of the second Cr between MoSi and phase-shifter is an etch stopper for MoSi and a HM to etch phase-shifter at the same time. However, Double HM process has some problems, such as first Cr removal during second Cr etching and complex process steps. To solve the Cr removal issues, we evaluated various Cr layers which have different etchrates and compositions. According to the evaluations, we optimized thicknesses and compositions of the two Cr layers and corresponding etching conditions. Lithography simulations demonstrate that the new HT-PSM has advantages in NILS in aerial images. As a result, initial wafer exposure experiments using the HT-PSM show 13-32% improvements in LCDU compared to that of the conventional 6% PSM due to its higher NILS.
In EUV Lithography, an absence of promising candidate of EUV pellicle demands new requirements of EUV mask cleaning which satisfy the cleaning durability and removal efficiency of the various contaminations from accumulated EUV exposure. It is known that the cleaning with UV radiation is effective method of variety of contaminants from surface, while it reduces durability of Ru capping layer. To meet the expectation of EUV mask lifetime, it is essential to understand the mechanism of Ru damage. In this paper, we investigate dominant source of Ru damage using cleaning method with UV radiation. Based on the mechanism, we investigate several candidates of capping to increase the tolerance from the cycled UV cleaning. In addition, we study durability difference depending on the deposition method of Ru capping. From these studies, it enables to suggest proper capping material, stack and cleaning process.
In EUVL, major impacts on determining critical dimension (CD) are resist process, scanner finger print, and mask characteristics. Especially, reflective optics and its oblique incidence of light bring a number of restrictions in mask aspect. In this paper, we will present one of the main contributors for wafer CD performance, such as center wavelength (CW) of multilayer (ML) in EUVL mask. We evaluate wafer CDs in 27.5nmHP L/S, 30nmHP L/S, and 30nmHP contact patterns with NXE3100 by using masks with purposely off-targeted CW ranging from 13.4 to 13.7nm. Based on the results from the exposure experiments, we verify that the CW specification for NXE3100 is regarded as 13.53 ± 0.015nm at CWU=0.03nm to satisfy the wafer CD requirements. According to verified simulations, however, we suggest a new CW specification for NXE3300 with higher values considering wide illumination cone angle from larger numerical aperture (0.33NA). Moreover, simulations in different exposure conditions of NXE3300 with various patterns below 20nm node show that customized CW specification might be required depending on target layers and illumination conditions. We note that it is also important to adjust CW and CWU in final mask product considering realistic difficulties of fabrcation, resulting in universal CW specification.
In this work, we use a high accuracy synchrotron-based reflectometer to experimentally determine the effects of angular bandwidth limitations on high NA EUV performance. We characterized mask blank and mask pattern diffraction performance as a function of illumination angle, scatter angle, and wavelength. A variety of pattern feature sizes ranging down to coded sizes of 11 nm (44 nm on the mask) are considered. A Rigorous Coupled-Wave Analysis (RCWA) model is calibrated against the experimental data to enable future model-based performance predictions. The model is optimized against the clearfield data and verified by predicting the mask pattern diffraction data. We thus have confirmed the degradation and asymmetry of diffraction orders at high AOI.
Amplitude defects (or absorber defects), which are located in absorber patterns or multilayer surface, can be repaired
during mask process while phase defects (or multilayer defects) cannot. Hence, inspection and handling of both defects
should be separately progressed. Defect printability study of pattern defects is very essential since it provides criteria for
mask inspection and repair. Printed defects on the wafer kill cells and reduce the device yield in wafer processing, and
thus all the printable defects have to be inspected and repaired during the mask fabrication. In this study, pattern defect
printability of the EUV mask as a function of hp nodes is verified by EUV exposure experiments. For 3x nm hp nodes,
defect printability is evaluated by NXE3100. For 2x nm hp node, since resolution of a current EUV scanner is not
enough, SEMATECH-Berkeley actinic inspection tool (AIT) as well as micro-field exposure tool (MET) in LBNL are
utilized to verify it,. Furthermore those printability results are compared with EUV simulations. As a result, we define
size of defects to be controlled in each device node.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing. Recently both blank suppliers achieved 1-digit number of defects at 60nm in
size using their M1350s. In this paper, a full field EUV mask with Teron 61X blank inspection is fabricated to see the
printability of various defects on the blank using NXE 3100. Minimum printable blank defect size is 23nm in SEVD
using real blank defect. Current defect level on blank with Teron 61X Phasur has been up to 70 in 132 X 132mm2. More
defect reduction as well as advanced blank inspection tools to capture all printable defects should be prepared for HVM.
3.6X reduction of blank defects per year is required to achieve the requirement of HVM in the application of memory
device with EUVL. Furthermore, blank defect mitigation and compensational repair techniques during mask process
needs to be developed to achieve printable defect free on the wafer.
The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography
(EUVL) into high volume manufacturing, yet little data is available for understanding native defects on real masks. In
this paper, a full field EUV mask is fabricated to see the printability of various defects on the mask. Programmed pit
defect shows that minimum printable size of pits could be 17 nm of SEVD from the AIT. However 23.1nm in SEVD is
printable from the EUV ADT. Defect printability and identification of its source along from blank fabrication to mask
fabrication were studied using various inspection tools. Capture ratio of smallest printable defects was improved to 80%
using optimized stack of metrical on wafer and state-of-art wafer inspection tool. Requirement of defect mitigation
technology using fiducial mark are defined.
When a bound document such as a book is scanned or copied with a flat-bed scanner, there are two kinds of defects in the scanned
image; the geometric and photometric distortion. The root cause of the defects is the imperfect contact between the book to be scanned
and the scanner glass plate. The long gap between the book center and the glass plate causes the optical path from the surface of the
book and the imaging unit(CCD/CIS) to be different from the optimal condition.
In this paper, we propose a method for restoring bound document scan images without any additional information or sensor. We
correct the bound document images based on the estimation of the boundary feature and background profile. Boundary Feature is
obtained after calculating and analyzing the Minimum Boundary Rectangle which encloses the whole foreground contents with
minimum size and the extracted feature is used for correcting geometric distortion; de-skew, warping, and page separation.
Background profile is estimated from the gradient map and it is utilized to correct photometric distortion; exposure problem.
Experimental results show effectiveness of our proposed method.
Printability and inspectability of phase defects in EUVL mask originated from substrate pit were investigated. For
this purpose, PDMs with programmed pits on substrate were fabricated using different ML sources from several
suppliers. Simulations with 32-nm HP L/S show that substrate pits with below ~20 nm in depth would not be printed on
the wafer if they could be smoothed by ML process down to ~1 nm in depth on ML surface. Through the investigation of
inspectability for programmed pits, minimum pit sizes detected by KLA6xx, AIT, and M7360 depend on ML smoothing
performance. Furthermore, printability results for pit defects also correlate with smoothed pit sizes. AIT results for
patterned mask with 32-nm HP L/S represents that minimum printable size of pits could be ~28.3 nm of SEVD. In
addition, printability of pits became more printable as defocus moves to (-) directions. Consequently, printability of
phase defects strongly depends on their locations with respect to those of absorber patterns. This indicates that defect
compensation by pattern shift could be a key technique to realize zero printable phase defects in EUVL masks.
Thinner absorber structure in EUVL mask is supposed to be applied in 2x HP node since it shows several
advantages including H-V bias reduction. Here, lithographic performances of EUVL masks as a function of absorber
stack height are investigated using ADT exposure experiments. Wafer SEM images show that minimum resolution is
almost identical at ~27.5 nm with absorber thickness ranging from 45 to 70 nm. Simulations also exhibit that NILS and
contrast become maximized and saturated in those ranges. However, thinner absorber structure using 50-nm-thick
absorber shows much lower H-V bias than conventional structure using 70-nm-thick absorber. MEEF, EL, DOF, and
LWR are also slightly improved with thinner absorber. One of the noticeable issues in thin absorber is low OD which
results in pattern damages and CD reduction at shot edges due to light leakage from the neighboring exposures. To
overcome these issues, appropriate light shielding process during mask fabrication as well as minimizing OoB radiation
in EUVL scanner are required. Another item to prepare for 2x HP node is to increase defect detection sensitivity with
19x nm inspection tools. Thus, absorber stacks with new ARC layer optimized for 19x nm inspection should be
developed and applied in EUVL mask blanks.
Phase-shifting EUVL masks applying thinner absorber are investigated to design optimum mask structure with less shadowing problems. Simulations using S-Litho show that H-V bias in Si capping structure is higher than that of Ru capping since the high n (= 0.999) of Si increases sensible absorber height. Phase differences obtained from the patterned masks using the EUV CSM are well-matched with the calculated values using the practical refractive index of absorber materials. Although the mask with 62.4-nm-thick absorber, among the in-house masks, shows the closest phase ΔΦ(= 176°) to the out-of-phase condition, higher NILS and contrast as well as lower H-V bias are obtained with 52.4-nm-thick absorber (ΔΦ = 151°) which has higher R/R0 ratio. MET results also show that lithography performances including MEEF, PW, and resist threshold (dose), are improved with thinner absorber structure. However, low OD in EUVL mask, especially in thinner absorber structure, results in light leakage from the neighboring exposure shots, and thus an appropriate light-shielding layer should be introduced.
Reduced design rules demand higher sensitivity of inspection, and thus small defects which did not affect printability
before require repair now. The trend is expected to be similar in extreme ultraviolet lithography (EUVL) which is a
promising candidate for sub 32 nm node devices due to high printing resolution. The appropriate repair tool for the small
defects is a nanomachining system. An area which remains to be studied is the nano-machining system performance
regarding repair of the defects without causing multilayer damage. Currently, nanomachining Z-depth controllability is 3
nm while the Ru-capping layer is 2.5 nm thick in a Buffer-less Ru-capped EUV mask. For this report, new repair
processes are studied in conjunction with the machining behavior of the different EUVL mask layers. Repair applications
to achieve the Edge Placement(EP) and Z-depth controllability for an optimal printability process window are discussed.
Repair feasibility was determined using a EUV micro exposure tool (MET) and Actinic Imaging Tool (AIT) to evaluate
repairs the 30 nm and 40 nm nodes. Finally, we will report the process margin of the repair through Slitho-EUVTM
simulation by controlling side wall angle, Z-depth, and EP (Edge Placement) on the base of 3-dimensional experimental
result.
Lifetime of EUVL masks which are intentionally contaminated with carbon is investigated by comparing Si and Ru
capping layer. Carbon deposition is observed not only on the multilayer, but also on the absorber sidewall of the mask.
Deposited carbon on the sidewall during EUV exposure gradually varies mask CD and also induces the changes in the
wafer printability and dose in the scanner. In addition, we compare the effects of carbon contamination between Si and
Ru capped blank. Ru capped blank shows longer mask mean time between cleaning (MTBC) than Si capped blank by 25% in our experiments.
We have fabricated extreme ultraviolet lithography (EUVL) blank masks consisting of a TaN absorber, Ru capping
layer, and Mo/Si multilayers using ion-beam sputter deposition and investigated their dependence on capping layer and
absorber stack structure. At EUV wavelengths, the reflectivities of the multilayers, including their dependency on the
thickness of the capping and absorber layers, are in good agreement with simulation results obtained using Maxwell
equations and the refractive indexes of each layer. Ru, one of the most promising capping materials on Mo/Si multilayers
due to its resistance to oxidation and selectivity to etching, also shows better EUV reflectivity than Si as a capping layer
if we choose a thickness that produces a constructive interference. To meet the reflectivity requirements (⩽ 0.5 %) in the
SEMI EUVL mask standard specifications, a TaN absorber at least 70 nm thick should be applied. However, aerial image
results simulated by using EM-Suite show that 40 nm is sufficient for the TaN absorber to display the maximum image
contrast. In addition, horizontal-vertical (HV) biasing effects due to mask shadowing become negligible if the TaN is
reduced to about 40 nm. As a result, we suggest using a thin TaN absorber 40 nm thick since it is able to minimize mask
shadowing effects without a loss of image contrast.
The impact of Stray Light (also sometimes called 'scattered light' or 'flare') in lithographic exposure tools is one of the key issues in EUV lithography to reduce its level to less than 10%. EUV mask can also be considered as one of the scattering sources because EUV mask used in memory and logic devices has various kinds of patterns with localized density variations, which are determined by patterned multilayer area. The most efficient way to decrease influences of stray light can be a combination of selective biasing and dummy implementation.
In this paper, the effect of EUV mask density variations on image quality is investigated in terms of process window, such as LWR, depth of focus, resolution, etc., while mask density surrounding features is varied from dark field to bright field by implementing dummy patterns. As a result, allowable mask background density, which does not affect image quality of surrounding features and decreases effects of stray light, is suggested.
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