Combining the strength of multiple photonic and electronics concepts in one hybrid and multi-chip platform is a promising solution for the diversification of chips for specific computing tasks to boost performance. Using additive and CMOS compatible one- (OPP) and two-photon polymerization (TPP), i.e. flash-TPP printing, we create low-loss 3D integrated photonic chips for scalable and parallel interconnects, which is challenging to realize in 2D. Here, we demonstrate the CMOS compatibility of such technology by merging polymer-based 3D photonic chips with diverse photonic platforms. We interfaced 3D waveguides on top of semiconductor (GaAs) quantum dot micro-lasers, yielding very high emission collection efficiency into the waveguides at cryogenic temperatures (4 K). Furthermore, we integrated our technology with silicon-on-insulator (SOI) platforms by efficiently coupling light from 2D planar SiN waveguides into out-of-plane 3D waveguides. With this, we lay a promising foundation for scalable integration of hybrid photonic and electronic platforms.
Additive fabrication, in particular direct-laser writing (DLW) combined with two-photon polymerization (TPP), stands out as an innovative tool for creating intricate 3D photonic components. However, the long fabrication time associated with DLW-TPP restricts large-scale implementations. Here, we introduce an adaptative lithography strategy, i.e. flash-TPP, combining one- (OPP) and TPP, while adjusting the resolution of the different sections of the photonic circuit, reducing the printing time by up to 90% compared to TPP-only. Via flash-TPP, we demonstrate the fabrication of polymer-cladded single-mode photonic waveguides and adiabatic splitters, with low 1.3 dB/mm (0.26 dB) propagation (injection) losses and record optical coupling losses of 0.06 dB with very symmetric (3.4 %) splitting ratios for adiabatic couplers. The scalability of output ports here addressed can only be achieved by using the three spatial dimensions, which is challenging in 2D.
The topology of neural networks fundamentally differs from classical computing concepts. They feature a colocation of memory and transformation of information, which makes them ill-suited for implementation in von Neumann architectures. In substrates pursuing in-memory computing, the connection topology of a neural network is encoded in the wiring of a chip, regardless of photonic or electronic, and this approach promises to revolutionize the efficiency of neural network computing. Equally general is that such in memory architectures cannot be implemented in 2D substrates, where their chip real-estate as well as energy consumption increase with an exponent larger unity with the number of neurons. I will discuss our recent work on using additive one and two photon polymerization in order to create 3D integrated photonic chips, that will allow to overcome this scaling bottleneck. Our process is CMOS compatible and hence maps a direct path to a technological implementation.
Low-loss single-mode optical coupling is a fundamental tool for most photonic networks, in both, classical and quantum settings. Adiabatic coupling can achieve highly efficient and broadband single-mode coupling using tapered waveguides and it is a widespread design in current 2D photonic integrated circuits technology. Optical power transfer between a tapered input and the inversely tapered output waveguides is achieved through evanescent coupling, and the optical mode leaks adiabatically from the input core through the cladding into the output waveguides cores. We have recently shown that for advantageous scaling of photonic networks, unlocking the third dimension for integration is essential. Two-photon polymerization (TPP) is a promising tool allowing dynamic and precise 3D-printing of submicrometric optical components. Here, we leverage rapid fabrication by constructing the entire 3D photonic chip combining one (OPP) and TPP with the (3+1)D flash-TPP lithography configuration, saving up to ≈ 90 % of the printing time compared to full TPP-fabrication. This additional photo-polymerization step provides auxiliary matrix stability for complex structures and sufficient refractive index contrast ∆n ≈ 5×10−3 between core-cladding waveguides and propagation losses of 1.3 dB/mm for single-mode propagation. Overall, we confront different tapering strategies and reduce total losses below ∼ 0.2 dB by tailoring coupling and waveguides geometry. Furthermore, we demonstrate adiabatic broadband functionality from 520 nm to 980 nm and adiabatic couplers with one input and up to 4 outputs. The scalability of output ports here addressed can only be achieved by using the three-spatial dimensions, being such adiabatic implementation impossible in 2D.
Scalability is essential for computing, yet classical 2D integration of neural networks faces fundamental challenges in this regard. Using 3D printing via two photon polymerization-based direct laser writing, we overcome this challenge and create low loss waveguides and demonstrate dense as well as convolutional network topologies that scale linear in size. Air-clad high-confinement waveguides allow for high-density multimode photonic integration. Leveraging the writing laser’s power as a degree of freedom in a (3+1)D printing technique, we also achieve precise control over refractive index contrast, which enables single mode propagation and low-loss evanescent couplers for next generation 3D integrated photonic circuits.
3D two-photon polymerization has shown to be an enabling tool allowing dynamic and precise printing of submicrometric optical components. Here, we focus on direct laser writing for the additive fabrication of 3D photonic waveguides, which are prime candidates for integrated, ultra-fast and parallel photonic interconnects. We here present a novel approach based on 3D optical splitters leveraging adiabatic coupling, which ensures a smooth single-mode transition between input and output waveguides. This unique 3D canonical architecture represents a clear breakthrough overcoming the long-standing challenges of parallel and scalable connections with high integration density for high-speed and energy-efficient neural networks computers.
We present a novel method for constructing quantum dot arrays using optical tweezers. By optically trapping 10 nm core-shell quantum dots we can position the quantum dots with submicron precision. The quantum dots are suspended in a resin (nanoscribe IP-G 780) which is then polymerized locally around the trapped quantum dot, fixating its position. The process of trapping and positioning is automated using a neural network to locate both free quantum dots and the position of quantum dots already in the array. The ability to locate the already positioned quantum dots is essential to achieving high precision and accuracy in the placement. Automation makes the process scalable and enables the manufacturing of large arrays. As a first step we demonstrate the construction of a 4x4 array of quantum dots.
Analog neural networks are promising candidates for overcoming the sever energy challenges of digital Neural Network processors. However, noise is an inherent part of analogue circuitry independent if electronic, optical or electro-optical integration is the target. I will discuss fundamental aspects of noise in analogue circuits and will then introduce our analytical framwork describing noise propagation in fully trained deep neural networks comprising nonlinear neurons. Most importantly, we found that noise accumulation can be very efficiently supressed under realistic hardware conditions. As such, neural networks implemented in analog hardware should be very robust to internal noise, which is of fundamental importance for future hardware realizations.
Photonic systems are candidates for next generation neural networks, promising to boost energy efficiency and speed via optical vector matrix multiplication. We will introduce the first scalable neural network integration strategy, demonstrating a network for 999 neurons in 0.36 mm^2.
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