Process windows, MEEF (Mask Error Enhancement Factor), flare, aberration effect of the CLM (Cr-less PSM) were measured by the simulations and experiments for the various DRAM cell and logic patterns compared with 6% transmittance HTPSM in the ArF lithography. We designed CLM layouts of sub 90 nm node DRAM and logic layers concerning the mask manufacturability, maximizing the NILS (Normalized Image Log Slope) and minimizing the MEEF with a semi-automatic OPC tool. Isolation, line and space and various contact patterns showed increasing process windows compared with HTPSM and this strongly depended on the layout design. We also introduced concept of checkerboard CLM to apply zigzag L/S and semi dense contact in the logic layer. Using 0.75 NA ArF Scanner, CLM showed NILS reduction by 10~15% in the presence of lens aberration and flare, which reduced DoF margin by about 0.1~0.2 μm depending on the layer. So the critical layers in sub 90 nm node DRAM satisfied 8% of EL (Exposure Latitude) and 0.3 μm of DoF (Depth of Focus) margin. Also 3D mask topographic effect of CLM in the specific contact layer was discussed.
Process windows, MEEF (Mask Error Enhancement Factor), flare, aberration effect of the CLM (Cr-less PSM) were measured by the simulations and experiments for the various DRAM cell patterns compared with 6% transmittance HTPSM in the ArF lithography. We designed CLM layouts of sub 100nm node DRAM cells concerning the mask manufacturability, maximizing the NILS (Normalized Image Log Slope) and minimizing the MEEF with a semi-automatic OPC tool. Isolation, line and space and various contact patterns showed increasing process windows compared with HTPSM and this strongly depended on the layout design. Using a 0.75 NA ArF Scanner, CLM showed NILS reduction by about 10% in the presence of lens aberration and flare, which reduced DoF margin by about 0.1~0.2μm depending on the layer. So the critical layers in sub 100 nm node DRAM satisfied 10% of EL (Exposure Latitude) and 0.1 μm of DoF (Depth of Focus) margin. Also 3D mask topographic effect of CLM in the specific layer was discussed.
ArF lithography has been successfully implemented for the development of sub-100nm DRAM devices. Such issues as CD (critical dimension) slimming during in-line SEM inspection and low dry etch resistance especially for SiN etch conditions, however, are still latent showstoppers for the production with ArF process. To overcome these problems, there are many efforts for continuous improvements in terms of material and process together with intensive study of new inspection tool and dry etch system. The curing process is one of promising candidates to stabilize the weak ArF resists. Many kinds of curing processes including e-beam curing, thermal curing, plasma curing, UV curing, and VUV (172nm) curing have been studied, and some of them have shown good effects until now. The new curing process with VUV (172nm) showed the most promising results. SEM induced CD slimming of ArF resist improved with 10 sec curing and D/E resistance highly increased with the curing. And there was no particle increase unlike e-beam curing process. And we also found that the re-flow of ArF resist with high Tg above degradation temperature was possible with the VUV curing. In this paper, the mechanism and properties of VUV curing processes will be discussed.
Process windows, MEEF (Mask Error Enhancement Factor), flare, aberration effect of the CLM (Cr-less PSM) were measured by the simulations and experiments for the various DRAM cell patterns compared with 6% transmittance HTPSM in the ArF lithography. We designed CLM layouts of sub 100nm node DRAM cells concerning the mask manufacturability, maximizing the NILS (Normalized Image Log Slope) and minimizing the MEEF with a semi-automatic OPC tool. Isolation, line and space and various contact patterns showed increasing process windows compared with HTPSM and this strongly depended on the layout design. Using 0.75 NA ArF Scanner, CLM showed NILS reduction by about 10% in the presence of lens aberration and flare, which reduced DoF margin by about 0.1~0.2 μm depending on the layer. So the critical layers in sub 100 nm node DRAM satisified 10% of EL (Exposure Latitude) and 0.4 μm of DoF (Depth of Focus) margin.
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