Mr. Kyu-Tae Sun Profile

Kyu-Tae Sun

at ASML Korea Co Ltd

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Author

Publications (11)

Proceedings Article | 24 March 2016 Paper

OPC optimization techniques for enabling the reduction of mismatch between overlay metrology and the device pattern cell

Shinyoung Kim, Chanha Park, Jinhyuck Jun, Jaehee Hwang, Hyunjo Yang, Nang-Lyeom Oh, Sean Park, Chris Park, Kyu-Tae Sun, Youping Zhang, Paul Tuffy

Proceedings Volume 9778, 97781S (2016) https://doi.org/10.1117/12.2219467

KEYWORDS: Overlay metrology, Optical proximity correction, Diffraction, Critical dimension metrology, Metrology, Scanning electron microscopy, Electron microscopes, Optical lithography, Error analysis, Target detection

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Proceedings Article | 24 March 2016 Paper

Mixed-mode, high-order multi-patterning control strategy with small-spot, optical CD metrology on device structures

Hugo Cramer, Baukje Wisse, Stefan Kruijswijk, Thomas Theeuwes, Yi Song, Wei Guo, Alok Verma, Rui Zhang, Yvon Chai, Sharon Hsu, Rahul Khandelwal, Giacomo Miceli, Steven Welch, Kyu-Tae Sun, Taeddy Kim, Jin-Moo Byun, Sang-Hoon Jung, Moo-Young Seo, Hyun-Sok Kim, Dong-Gyu Park, Jong-Mun Jeong

Proceedings Volume 9778, 97782E (2016) https://doi.org/10.1117/12.2220782

KEYWORDS: Critical dimension metrology, Process control, Scatterometry, Metrology, Etching, Control systems, Scanners, Optical lithography, Semiconducting wafers, Reticles

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Proceedings Article | 15 March 2016 Paper

Reduction of wafer-edge overlay errors using advanced correction models, optimized for minimal metrology requirements

Min-Suk Kim, Hwa-Yeon Won, Jong-Mun Jeong, Paul Böcker, Lydia Vergaij-Huizer, Michiel Kupers, Milenko Jovanović, Inez Sochal, Kevin Ryan, Kyu-Tae Sun, Young-Wan Lim, Jin-Moo Byun, Gwang-Gon Kim, Jung-Joon Suh

Proceedings Volume 9780, 97800A (2016) https://doi.org/10.1117/12.2220459

KEYWORDS: Semiconductor manufacturing, Performance modeling, Metrology, Overlay metrology, Lithography, Semiconducting wafers, Process modeling, Optical lithography, Process control, Lithium, Yield improvement, Data modeling

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Proceedings Article | 8 March 2016 Paper

Spacer multi-patterning control strategy with optical CD metrology on device structures

Jongsu Lee, Byoung-Hoon Lee, Won-Kwang Ma, Sang-Jun Han, Young-Sik Kim, Noh-Jung Kwak, Thomas Theeuwes, Wei Guo, Yi Song, Baukje Wisse, Stefan Kruijswijk, Hugo Cramer, Steven Welch, Alok Verma, Rui Zhang, Yvon Chai, Sharon Hsu, Giacomo Miceli, Kyu-Tae Sun, Jin-Moo Byun

Proceedings Volume 9778, 97782B (2016) https://doi.org/10.1117/12.2219664

KEYWORDS: Etching, Metrology, Process control, Control systems, Critical dimension metrology, Scatterometry, Optical lithography, Image processing, Scatter measurement, Measurement devices, Semiconducting wafers, Inspection

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Proceedings Article | 23 October 2015 Paper

Reduction of in-lot overlay variation with integrated metrology, and a holistic control strategy

Hong-Goo Lee, Sang-Jun Han, Won-Kwang Ma, Young-Sik Kim, Noh-Jung Kwak, Paul Böcker, David Deckers, Weitian Kou, Michiel Kupers, Kevin Ryan, Elliott McNamara, Gwang-Gon Kim, Kyu-Tae Sun, Young-Wan Lim, Jin-Moo Byun, Jung-Joon Suh

Proceedings Volume 9635, 96351S (2015) https://doi.org/10.1117/12.2196879

KEYWORDS: Semiconducting wafers, Metrology, Principal component analysis, Overlay metrology, Optical alignment, Immersion lithography, Time metrology, Scanners, Semiconductor manufacturing, Diffraction

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Proceedings Article | 7 April 2015 Paper

Understanding of stochastic noise

Seo-Min Kim, Chang-Moon Lim, Mi-Rim Jung, Young-Sik Kim, Won-Taik Kwon, Chang-Nam Ahn, Kyu-Tae Sun, Anita Fumar-Pici, Alek Chen

Proceedings Volume 9422, 94220M (2015) https://doi.org/10.1117/12.2087559

KEYWORDS: Stochastic processes, Photomasks, Absorption, Critical dimension metrology, Extreme ultraviolet, Immersion lithography, Lithography, Photoresist processing, Line width roughness, Particles

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Proceedings Article | 19 March 2015 Paper

Improving full-wafer on-product overlay using computationally designed process-robust and device-like metrology targets

Young-Sik Kim, Young-Sun Hwang, Mi-Rim Jung, Ji-Hwan Yoo, Won-Taik Kwon, Kevin Ryan, Paul Tuffy, Youping Zhang, Sean Park, Nang-Lyeom Oh, Chris Park, Mir Shahrjerdy, Roy Werkman, Kyu-Tae Sun, Jin-Moo Byun

Proceedings Volume 9424, 942414 (2015) https://doi.org/10.1117/12.2085645

KEYWORDS: Overlay metrology, Metrology, Target detection, Semiconducting wafers, Optical proximity correction, Resolution enhancement technologies, Reticles, Lithography, Optical lithography, Etching

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Proceedings Article | 19 March 2015 Paper

Virtual overlay metrology for fault detection supported with integrated metrology and machine learning

Hong-Goo Lee, Emil Schmitt-Weaver, Min-Suk Kim, Sang-Jun Han, Myoung-Soo Kim, Won-Taik Kwon, Sung-Ki Park, Kevin Ryan, Thomas Theeuwes, Kyu-Tae Sun, Young-Wan Lim, Daan Slotboom, Michael Kubis, Jens Staecker

Proceedings Volume 9424, 94241T (2015) https://doi.org/10.1117/12.2085475

KEYWORDS: Semiconducting wafers, Overlay metrology, Metrology, Wafer testing, Machine learning, Neural networks, Data modeling, Optical alignment, Scanners, Process engineering

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Proceedings Article | 2 April 2014 Paper

CD uniformity optimization at volume ramp up stage for new product introduction

Jin-Soo Kim, Won-Kwang Ma, Young-Sik Kim, Myoung-Soo Kim, Won-Taik Kwon, Sung-Ki Park, Peter Nikolsky, Marian Otter, Maryana Escalante Marun, Roy Anunciado, Kyu-Tae Sun, Greet Storms, Ewould van West

Proceedings Volume 9050, 905037 (2014) https://doi.org/10.1117/12.2057390

KEYWORDS: Semiconducting wafers, Critical dimension metrology, Yield improvement, Semiconductors, Etching, Photoresist processing, Optical lithography, Process control, Overlay metrology, Manufacturing

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Proceedings Article | 2 April 2010 Paper

Improvement of the process overlay control for sub-40-nm DRAM

Sarohan Park, Eun-Ha Lee, Eun-Kyoung Shin, Yoon-Jung Ryu, Hye-Jin Shin, Seung-Hyun Hwang, Hee-Youl Lim, Kyu-Tae Sun, Tae-Seung Eom, Noh-Jung Kwak, Sung-Ki Park

Proceedings Volume 7638, 76382H (2010) https://doi.org/10.1117/12.846489

KEYWORDS: Semiconducting wafers, Overlay metrology, Chemical mechanical planarization, Process control, Distortion, Photomasks, Optical alignment, Optical lithography, Data modeling, Control systems

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Proceedings Article | 4 March 2010 Paper

Applications of MoSi-based binary intensity mask for sub-40nm DRAM

Tae-Seung Eom, Eun-Kyoung Shin, Eun-Ha Lee, Yoon-Jung Ryu, Jun-Taek Park, Sunyoung Koo, Hye-Jin Shin, Seung-Hyun Hwang, Hee-Youl Lim, Sarohan Park, Kyu-Tae Sun, Noh-Jung Kwak, Sung-Ki Park

Proceedings Volume 7640, 76402J (2010) https://doi.org/10.1117/12.846728

KEYWORDS: Photomasks, Binary data, Transmittance, Diffraction, Chromium, Polarization, Lithography, Scanners, Nanoimprint lithography, Optical lithography

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In this paper, we will present applications of MoSi-based binary intensity mask for sub-40nm DRAM with hyper-NA immersion scanner which has been the main stream of DRAM lithography. Some technical issues will be reported for polarized illumination and mask materials in hyper-NA imaging. One att.PSM (Phase Shift Mask) and three types of binary intensity mask are used for this experiment; those are ArF att.PSM ( MoSi:760Å , transmittance 6% ), conventional Cr ( 1030Å ) BIM (Binary Intensity Mask), MoSi-based BIM ( MoSi:590Å , transmittance 0.1%) and multi layer ( Cr:740Å / MoSi:930Å ) BIM. Simulation and experiment with 1.35NA immersion scanner are performed to study influence of mask structure, process margin and effect of polarization. Two types of DRAM cell patterns are studied; one is a line and space pattern and the other is a contact hole pattern through mask structure. Various line and space pattern is also through 38nm to 50nm half pitch studied for this experiment. Lithography simulation is done by in-house tool based on diffused aerial image model. EM-SUITE is also used in order to study the influence of mask structure and polarization effect through rigorous EMF simulation. Transmission and polarization effects of zero and the first diffraction orders are simulated for both att.PSM and BIM. First and zero diffraction order polarization are shown to be influenced by the structure of masking film. As pattern size on mask decreases to the level of exposure wavelength, incident light will interact with mask pattern, thereby transmittance changes for mask structure. Optimum mask bias is one of the important factors for lithographic performance. In the case of att.PSM, negative bias shows higher image contrast than positive one, but in the case of binary intensity mask, positive bias shows better performance than negative one. This is caused by balance of amplitude between first diffraction order and zero diffraction order light.1 Process windows and mask error enhancement factors are measured with respect to several types of mask structure. In the case of one dimensional line and space pattern, MoSi-based BIM and conventional Cr BIM show the best performance through various pitches. But in the case of hole DRAM cell pattern, it is difficult to find out the advantage of BIM except of exposure energy difference. Finally, it was observed that MoSi-based binary intensity mask for sub- 40nm DRAM has advantage for one dimensional line and space pattern.

Showing 5 of 11 publications

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