KEYWORDS: Sensors, Short wave infrared radiation, Personal digital assistants, Photodiodes, Modulation transfer functions, Sensor technology, Detector arrays, Capacitance
Sensors Unlimited Inc. (SUI), a Raytheon Technologies Company, has long been the vanguard of low-noise InGaAs/InP PiN back-side illuminated (BSI) planar-type photodiode technology. In addition to focusing on dark current reduction efforts, SUI has also initiated other photodiode detector array (PDA) improvement efforts to better serve its broad portfolio of sensor technology. In previous years, SUI has presented results related to mesa-structure PDAs for modulation transfer function (MTF) improvement and hybridization capacitance reduction for NEI improvement. An update to these technologies is offered. Additionally, SUI has more recently engaged in more advanced PDA development to better satisfy active imaging applications. Results of these efforts are also presented.
The increasing demand for short wave infrared (SWIR) imaging technology for soldier-based and unmanned
platforms requires camera systems where size, weight and power consumption are minimized without loss of
performance. Goodrich, Sensors Unlimited Inc. reports on the development of a novel focal plane (FPA) array for
DARPA's MISI (Micro-Sensors for Imaging) Program. This large format (1280 x 1024) array is optimized for
day/night imaging in the wavelength region from 0.4 μm to 1.7 μm and consists of an InGaAs detector bump bonded to a
capacitance transimpedance amplifier (CTIA)-based readout integrated circuit (ROIC) on a compact 15 μm pixel pitch.
Two selectable integration capacitors provide for high dynamic range with low (< 50 electrons) noise, and expanded onchip
ROIC functionality includes analog-to-digital conversion and temperature sensing. The combination of high
quality, low dark current InGaAs with temperature-parameterized non-uniformity correction allows operation at ambient
temperatures while eliminating the need for thermoelectric cooling. The resulting lightweight, low power
implementation is suitable for man-portable and UAV-mounted applications.
Goodrich, SUI has developed a 15 μm pitch, 1280 x 1024 pixel InGaAs focal plane array (FPA) with low noise, and
visible to near infrared (0.4 μm to 1.7 μm) wavelength response for day and night vision applications. The readout
integrated circuit (ROIC), which uses a capacitive transimpedance amplifier (CTIA) pixel, is designed to achieve a noise
level of less than 50 electrons, due to its small integration capacitor. The ROIC can be read out at 120 frames per second,
and has a dynamic range of 3000:1 using rolling, non-snapshot integration. The ROIC was fabricated in a standard
CMOS foundry process, and was bump-bonded to Vis-InGaAsTM detector arrays. SUI has successfully hybridized 15 μm
pitch 1280 x 1024 pixel FPAs, and produced imagery.
The DARPA PCAR program is sponsoring the development of low noise, near infrared (1.5 &mgr;m wavelength) focal
plane arrays (FPAs) for night vision applications. The first phase of this work has produced a collection of 640 x 512
pixel, 20 &mgr;m pitch FPAs with low noise. The approach was to design four different read out integrated circuits
(ROICs), all compatible with the same bump-bonded InGaAs photodiode detector array. Two of the designs have
capacitive transimpedance amplifier (CTIA) pixels, each with a somewhat different amplifier design and with two
different sizes of small integration capacitors. The third design is a source follower per detector (SFD) pixel,
integrating on the detector capacitance. The fourth design also integrates on the detector capacitance, but uses a
moderate gain, in-pixel amplifier to boost the signal level, and also has a differential pixel output. All four designs
require off-chip correlated sampling to achieve the desired noise level. The correlated sampling is performed digitally
in the data acquisition software. Each design is capable of 30 frames per second read out rate, and has a dynamic range
of 1000:1 using a rolling, non-snapshot integration. The designs were fabricated in a standard CMOS foundry process,
and were bump-bonded to InGaAs detector arrays. All four designs are working without any significant design errors,
and are producing low noise imaging, with less than 50 electrons rms noise per pixel after correlated double sampling.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.