A multi-channel free-space micro-optical module for dense MCM-level optical interconnections has been designed and fabricated. Extensive modeling proves that the module is scalable with a potential for multi-Tb/s.cm2 aggregate bit rate capacity while alignment and fabrication tolerances are compatible with present-day mass replication techniques. The micro-optical module is an assembly of refractive lenslet-arrays and a high-quality micro-prism. Both components are prototyped using deep lithography with protons and are monolithically integrated using vacuum casting replication technique. The resulting 16-channel high optical-grade plastic module shows optical transfer efficiencies of 46% and inter-channel cross talks as low as -22 dB, sufficient to establish workable multi-channel MCM-level interconnections. This micro-optical module was used in a feasibility demonstrator to establish intra-chip optical interconnections on a 0.6μm CMOS opto-electronic field programmable gate array. This opto-electronic chip combines fully functional digital logic, driver and receiver circuitry and flip-chipped VCSEL and detector arrays. With this test-vehicle multichannel on-chip data-communication has been achieved for the first time to our knowledge. The bit rate per channel was limited to 10Mb/s because of the limited speed of the chip tester.
We fabricated and replicated in semiconductor compatible plastics a multichannel free-space optical interconnection module designed to establish intra-chip interconnections on an Opto-Electronic Field Programmable Gate Array (OE-FPGA). The micro-optical component is an assembly of a refractive lenslet-array and a high-quality microprism. Both components were prototyped using deep lithography with protons and were monolithically integrated using a vacuum casting replication technique. The resulting 16-channel module shows optical transfer efficiencies of 50% and interchannel crosstalks as low as -22 dB. These characteristics are sufficient to establish multichannel intra-chip interconnects with OE- FPGAs. The OE-FPGA we used was designed within a European co- founded MEL-ARI consortium, working towards a manufacturable solution for optical interconnects between CMOS ICs. The optoelectronic chip combines fully functional FPGA digital logic with the drivers, receivers and flip-chipped optoelectronic components. It features 2 optical inputs and 2 optical outputs per FPGA cell, amounting to 256 photonic I/O links based on multimode 980-nm VCSELs and InGaAs detectors.
Centimeter-range high-density optical interconnect between chips is coming into reach with current optical interconnect technology. Many theoretical studies have identified several good reasons why to use such types of interconnect as a replacement of various layers of the traditional electronic interconnect hierarchy. However, the true feasibility and usefulness of optical interconnects can only be established by actually building and evaluating them in a real system setting. This contribution reports on our experience in using short-range high-density optical inter-chip interconnects. It is based on the design and construction of a fully functional optoelectronic demonstrator system. We discuss the rationale for building the demonstrator in the first place, the implications of using many low-level optical interconnections in electronic systems, and the degree to which our expectations have been fulfilled by the demonstrator. The detailed description of the architecture, design and implementation of the demonstrator is not presented here, but can be found elsewhere in this issue.
Architectural studies have identified field-programmable gate arrays (FPGA) as a class of general-purpose very large scale integration components that could benefit from the introduction at the logic level of state-of-the-art massively parallel optical inter-chip interconnections. In this paper, we present a small-scale optoelectronic multi-FPGA demonstrator in which three optoelectronic enhanced FPGAs are interconnected by 2D Plastic Optical Fiber (POF) ribbon arrays. The full-custom FPGA chips consisting of an 8 X 8 array of very simple programmable logic cells are equipped with two optical sources and two receivers per FPGA cell yielding a maximum of 256 optical links per chip. The optical links are designed for signaling rates of 80 to 100 Mbit/s (160 to 200 Mbaud using Manchester coded data) compatible with the maximum clock frequency of the, in 0.6 micrometers CMOS implemented, FPGA chips. The results of parallel link experiments between such modules with both VCSELs and LEDs as sources will be shown. A large scale parallel bit error rate experiment at 90 Mbit/s/channel between two half-populated VCSEL-based FPGA modules with 112 of their 128 channels operational at bit error rates below 10-13 on all active channels (approximately equals 10 Gbit/s/chip) proves the feasibility of this approach. We first briefly discuss the general architecture and the realization of the optoelectronic FPGA demonstrator system. We then present measurement results on the available modules, followed by some conclusions on this work.
We report on the design, the fabrication, the characterization and the demonstration of scalable multi-channel free-space interconnection components with the potential for Tb/s.cm2 aggregate bit rate capacity over inter-chip interconnection distances. The demonstrator components are fabricated in a high quality optical plastic, PMMA, using an ion-based rapid prototyping technology that we call deep proton lithography. With the presently achieved Gigabit/s data rates for each of the individual 16 channels with a BER smaller than 10-13 and with inter-channel cross-talk lower than -22dB the module aims at optically interconnecting 2-D opto-electronic VCSEL and receiver arrays, flip-chip mounted on CMOS circuitry. Furthermore, using ray-tracing software and radiometric simulation tools, we perform a sensitivity analysis for misalignment and fabrication errors on these plastic micro-optical modules and we study industrial fabrication and material issues related to the mass- replication of these components through injection-molding techniques. Finally we provide evidence that these components can be mass-fabricated in dedicated, highly-advanced optical plastics at low cost and with the required precision.
We report on the design, the fabrication, the characterization and the demonstration of a scalable multi- channel free-space interconnection components with the potential for Tb/x.cm2 aggregate bit rate capacity over inter-chip interconnection distances. The demonstrator components are fabricated in a high quality optical plastic, PMMA, using an ion-based rapid prototyping technology that we call deep proton lithography. With the presently achieved Gigabit/s data rates for each of the individual 16 channels with a BER smaller than 10-13 and with inter-channel cross-talk lower than -22dB the module aims at optically interconnecting 2-D opto-electronic VCSEL and receiver arrays, flip-chip mounted on CMOS circuitry. Furthermore, using ray-tracing software and radiometric simulation tools, we perform a sensitivity analysis fo misalignment and fabrication errors on these plastic micro- optical modules and we study industrial fabrication and material issues related to the mass-replication of these components through injection-molding techniques. Finally we provide evidence that these components can be mass- fabricated in dedicated, highly-advanced optical plastics at low cost and with the required precision.
It is our goal to demonstrate the viability of massively parallel optical interconnections between electronic VLSI chips. This is done through the development of the technology necessary for the realization of such interconnections, and the definition of a systems architecture in which these interconnections play a meaningful role. Field-programmable gate arrays (FPGA) have been identified as a class of general-purpose very large scale integration components that could benefit from the massive introduction of state-of-the-art optical inter-chip interconnections at the logic level. In this paper, we present the realization of a small-scale optoelectronic FPGA with 8 X 8 logic cells, containing two optical sources and two receivers per FPGA cell yielding a total of 256 links per chip. These FPGA chips designed to operate with information rates of 80 Mbit/s/link will be used in a three- chip demonstrator system as a test bed for the concepts above. We first identify the reason why we think optical interconnects can provide added value in FPGAs. The next sections briefly discuss the general architecture of our demonstrator system and the realization of the optoelectronic FPGA. We then present first measurement results followed by ongoing work and conclusions.
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