Mr. Min Woo Kang Profile

Min Woo Kang

at SK Hynix Inc

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Author

Publications (2)

Proceedings Article | 10 April 2024 Poster + Paper

Universal denoiser to improve metrology throughput

Yonghyun Kim, Seyun Kim, Hoon Byun, Sang-Gil Park, Taejong Lee, Seongil Lee, Minwoo Kang, Il Koo Kim

Proceedings Volume 12955, 1295536 (2024) https://doi.org/10.1117/12.3010773

KEYWORDS: Metrology, Semiconductors, Image quality, Image enhancement, Scanning electron microscopy, Denoising, Image processing

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The semiconductor manufacturing process is a complex and highly technical operation, demanding precise and consistent metrology throughout its prolonged duration. As manufacturing processes grow in complexity, it becomes imperative to measure key variables of the intermediate products. Consequently, there is an increased demand for higher throughput in metrology to enhance measurement capacity. The electron-beam (E-Beam) metrology tools can be accelerated by integrating denoiser models for image enhancement and reducing the sample rate of raw images. We propose a novel universal denoising method specifically tailored for the semiconductor industry. Distinct from traditional denoisers designed for standard cameras and the RGB space, our proposed solution is tailored to the nano-scale structures and noise patterns inherent in semiconductor images obtained via E-beam tools. To meet the strict precision requirements of semiconductor metrology, where even minimal deviations carry substantial implications, our approach introduces a specialized network structure with novel loss functions that reflect the unique characteristics of semiconductor metrology. We propose a novel conditioning scheme to apply a single trained model to diverse image domains from various wafer products and layers. By combining the proposed loss functions and conditioning scheme, we can universally handle multiple image domains with a single model. This method significantly reduces time expenditure while preserving the crucial accuracy necessary for high-quality semiconductor production. Through comprehensive volume testing across diverse metrology recipes, which covers the entire spectrum of DRAM fabrication, our method has demonstrated a notable increase in metrology throughput, achieving an average enhancement of 26%, and reaching up to 46%, all without compromising accuracy or reliability. This breakthrough offers a versatile and efficient solution, marking a significant advancement in the field of semiconductor manufacturing.

Proceedings Article | 10 April 2024 Presentation + Paper

The importance of less damaged and surface sensitive metrology to identify true EUV process monitoring

GwangSeob Lim, EunKyeong Jang, BoGyeong Choi, Jihyun An, MinWoo Kang, Sunghun Lim, Jong-Hoi Cho, Daiyoung Mun, Ran Alkoken, Tal Vol, Yana Branzburg, You Jin Kim, Jeong Ho Yeo, KyungJae Choi, Kyeongju Han, Sujin Lim, Jaemin Cho, JaeEun Lim, WooSung Jung, Chanhee Kwak, Hyeon Sang Shin

Proceedings Volume 12955, 1295517 (2024) https://doi.org/10.1117/12.3012913

KEYWORDS: Shrinkage, Etching, Extreme ultraviolet, Photoresist materials, Metrology, Semiconducting wafers, Extreme ultraviolet lithography, Photoacid generators, Stochastic processes, Critical dimension metrology

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The adoption of EUV technology in DRAM fabrication is primarily driven by the pursuit of higher device densities, improved performance, and increased energy efficiency. EUV's shorter wavelength (13.5 nm) enables enhanced resolution and finer patterning, enabling the production of smaller memory cells with reduced feature sizes. As the target patterning size is becoming sub-10nm, line edge/width roughness (LER/LWR) is the centerpiece in controlling uniformity of pattern going through the lithography process. Accordingly, it is essential to figure out the dedicated CDSEM metrology method for EUV step without any image quality degradation, charging issue, and e-beam damage that can hinder accurate diagnosis of the real process status. Empirically, it is highly difficult to predict the best metrology condition that fits to the specific resist material, dimension, and geometry due to complex stochastic effect caused by secondary electron inside photoresist (PR) material. Here we represent experimental results of PR damage caused by electron beam irradiation with different landing energy for both line and space (LS) pattern and contact hole (CH) pattern. The results enabled us to define the effect of the landing energy and geometry of pattern on the critical dimension (CD) and roughness. We examined electron irradiation induced damage by comparing etch bias of fresh location and e-beam exposed location on etch process step to fully understand shrinkage and deformation behavior. For the roughness measurement of CH pattern, we adopted new metric which enables us to quantify contact edge roughness and shape of contact. Utilizing various metrics, it was possible to observe damage on the process, which was not observed only by CD changes, and it was confirmed that the primary beam with low landing energy could be used to not only reduce damage but also enhance surface sensitivity of metrology without bias which is crucial for stochastic effect monitoring on the EUV process.

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