As Internet-of-Things (IoT) devices continue to grow rapidly in number, developing energy-efficient memory solutions has become critically important. This paper introduces an innovative Phase Change Memory (PCM) architecture that can significantly reduce memory energy consumption in IoT devices. After highlighting the energy-inefficiency of current memory designs, we explore the possibilities of leveraging PCM. We demonstrate that the benefits of exploiting PCM are dependent on the working frequency of the CPU and show how PCM can surpass devices with SRAM and DRAM. As a replacement candidate for FLASH, PCM can also be utilized instead of SRAM and DRAM. We also demonstrate that based on the application we can also save more energy. Ongoing work focuses on deployment of this application dependency and enhancing energy efficiency of devices using PCM. Our PCM innovation enables improved functionality lifetimes for non-volatile IoT edge devices. This represents a major advance towards realizing widespread integration of photonics and electronics in IoT hardware.
We demonstrate an optical accelerator for convolutional neural networks using photonic tensor cores that achieves both state-of-the-art accuracy competitive with ideal floating point models, and unprecedented acceleration performance exceeding electronics by orders of magnitude. Across convolutional architectures and image datasets, the photonics-based hardware processes advanced inference workloads faster than alternate ASICs or GPUs. Additionally, power consumption and latency metrics are consistently lowered by using integrated optics - enabling real-time throughput while maintaining accuracy. By unlocking massively parallel and high bandwidth optical matrix operations, this approach promises to revolutionize compute-intensive CNN applications spanning medical imaging, scientific computing, autonomous systems and beyond. Fully integrated optical neural network accelerators now bring extraordinary speed, efficiency and scalability, opening new frontiers in artificial intelligence.
KEYWORDS: Silicon photonics, Fourier transforms, Convolutional neural networks, Convolution, Photodetectors, Analog to digital converters, Neural networks, Field programmable gate arrays, Video processing, Power consumption
Convolution Neural Networks are one of the most used networks for Machine Learning. But convolution operation is one of the most demanding operations for electronic units to perform. Here, we present the first integrated PhotoFourier chip, capable of performing Joint Correlation Transformation on a Silicon Photonic chip, reducing the computation complexity from O(N^2) to O(N) at GHz speed rate.
Convolution neural networks (CNNs) have garnered significant attention in today's digital world due to their remarkable ability to analyze medical images, recognize speech, translate languages, and make intelligent decisions. However, the convolution operation, which plays a vital role in neural networks, imposes a high computational cost, increasing power consumption and latency, particularly when dealing with large matrices. Integrated photonics presents an exciting opportunity to drastically accelerate CNNs with its virtual O(1) cost and speed-of-light latency, by leveraging the properties of Fourier optics. In this study, we propose the design, fabrication and testing of an integrated photonic system for convolutional neural networks based on the 4F system. Moreover, we introduce an innovative backscattering method to accurately adjust the phase of each micro-disk modulator (MDM), ensuring precise on-chip Fourier transform operations. Furthermore, we demonstrate the system's potential for achieving higher speeds through its scalability with multiple wavelengths and optical buffers.
The high demand for AI services in conjunction with a dramatic chip shortage along with technology leaps such as 5/6G networks, quantum technologies, cybersecurity threats, and the CHIPS Act have resurrected a R&D push for next-generation semiconductor materials, devices, and information processing hardware capability. In this paper, we will present the latest advances in regarding programable photonics and chip, from devices to packaging and system architecture, bringing these innovations into the bigger picture of macro trends and national priorities such as Industry-4.0 and the recent U.S. CHIPS Act.
Convolution Neural Networks are one of the pillars of the Machine Learning revolution over the last years. However, convolution operation is associated with a high computational cost. Here, we present a compact and high-speed solution to perform convolution leveraging optics on a chip, with the potential to reach over 350 TOPS/W.
In this paper, we present an improved version of an Application-Specific Photonic Integrated Chip for solving Partial Differential Equations (PDEs). This novel chip is designed to solve PDEs with specific reflecting boundary conditions, by means of a series of integrated mirrors at the edges.
Convolution Neural Networks have raised as the key technology for most of the novel applications that appear in the last years. Convolution, the main operation that CNN has to perform, has a high computational cost, raising power consumption and latency, especially for large matrices. Optics and photonics can perform the same operation at virtual O(1) cost and speed-of-light latency, thanks to the properties of Fourier optics. In this paper, we will show the implementation of the main components and the modeling for non-idealities that might occur.
Here we introduce a Fourier-Theorem based convolution processors in silicon photonics. The systems leverages an algorithmic homomorphism that utilizes the Fourier transformation provided by a lens along with high-speed optoelectronic signal modulation and read-out. We demonstrate convolution filtering for image processing, convolutional neural network classification tasks. An on-chip lens performs the convolution operation, whereas electro-optic modulators perform the weighting in the Fourier domain at high-speed, followed by detection at a detector array after a 2nd Fourier lens, all on a PIC. Using this accelerator, we demonstrate image filtering and machine learning inference tasks. Given the high SWAP, these accelerators are useful for network-edge AI for the coming Industry-4.0 era.
Photonic Tensor Cores (PTCs) have been raised as one of the major candidates to accelerate Neural Network hardware, taking advantage of the high bandwidth, low latency, and energy efficiency that propagating light has over the electrical counterpart. However, actual solutions still rely on external bulk components, such as lasers, modulators, and photodetectors. In this work, we show the first fully integrated hybrid Silicon Photonics PTC for computing Matrix-Vector Multiplication (MVM), one of the main steps for any Neural Network layer. The PTC is formed by a WDM 3-fold InP laser array connected to an active Silicon Photonic PIC through Photonic Wire Bondings. The CW lasers are modulated by high-speed Mach-Zehnder modulators to generate the input vector. The mix of all the signals is sent into a 3x3 matrix, formed by high-speed add-drop coupled microring resonators, whose tuning signals are the weights of the matrix. Outputs are collected by a bank of high-speed integrated photodetectors. The whole photonics IC has a footprint of 4.1×1.7 mm2, including lasers, allowing to have just electrical I/O. The full integration of input modulators, weights, and photodetectors can allow the PIC to work at over 20 GHz bandwidth with extremely low latency. This integration is a key step toward the actual deployment of photonics as an NN-accelerator for future AI systems.
Phase-change materials offer a compelling platform for low power consumption active integrated optical circuits and meta optics, with their large optical index contrast (Δn, Δk) and nonvolatile phase transition1,2. Here, we demonstrate an electrically driven tunable meta lens in telecom range by exploring the full potential of a low absorption loss and high refractive index contrast PCM alloy, Sb2Se3, to realize non-volatile, reversible, fast focusing and defocusing meta lens in the 1550 telecom spectral range. With a fixed geometric design, the phase change material of Sb2Se3 switches the focusing length of a silicon photonic meta lens between two different values nonviolently. This unique functionality of the hybrid meta surface is attributed to the fact that the silicon’s refractive index is in the middle of the two convertible states in the optical phase change material. The transparency of Sb2Se3 in both states enables near phase-only meta surface structures. Our heterostructure architecture capitalizes over the integration of a robust resistive transparent microheater ITO (Indium Tin Oxide) decoupled from meta lens enabling good model to overlap with PCM meta pillars enables high transmission efficiency. The project be experimentally demonstrating an electrically reconfigurable phase-change meta lens capable of modulation an incident light beam into focusing of defocusing two different statures. This work represents a critical advance towards the development of integrable dynamic meta lens and their potential for beamforming applications.
Photonic tensor core circuits have been widely explored as possible hardware accelerators for the next generation of machine learning applications, due to the large bandwidth, low latency, and energy saving that light has. Many architectures have been presented, especially exploiting photonic integrated circuits. However, most of the proposed solutions lack some features, such as integration, scalability, or energy saving. In this paper, we review the major achievements in recent years, showing how high integration can lead to better performance, but it could also limit the scalability of the overall system.
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