As an important link of the Internet of Things, wireless sensor network has great potential in industry, agriculture and daily use of residents. To ensure cloud data security, data is encrypted before being uploaded to the cloud. However, how to ensure the searchability of ciphertext in cloud is challenging. To solve the above problems, a searchable encryption scheme for sensor networks is proposed. The sensor node collects the data, encrypts it and uploads it to the smart contract after collecting the data from the local gateway. In this scheme, the concept of version information is introduced to authenticate ciphertext version so as to realize access control of trap gates of different versions. In order to avoid data leakage caused by the information storage center, the searchable encryption technology is combined with the block chain technology, and the smart contract is used as the data storage center, so as to ensure efficient ciphertext retrieval and eliminate malicious behavior on the server side. Through security analysis, it is proved that the scheme satisfies ciphertext indistinguishability and forward security based on DBDH hard problems. Experimental efficiency analysis shows that the scheme has certain advantages in computational efficiency.
KEYWORDS: Semiconducting wafers, Sensors, Chemical mechanical planarization, Scanners, Back end of line, Monochromatic aberrations, Calibration, Process control, Front end of line, Etching
The understanding of focus variation across a wafer is crucial to CD control (both ACLV and AWLV) and pattern fidelity on the wafer and chip levels. This is particularly true for the 65nm node and beyond, where focus margin is shrinking with the design rules, and is turning out to be one of the key process variables that directly impact the device yield. A technique based on the Phase-Shift Focus Monitor (PSFM) is developed to measure realistic across-wafer focus errors on materials processed in actual production flows. With this technique, we are able to extract detailed across-wafer focus performance at critical pattern levels from the front end of line (FEOL) all the way through the back end of line (BEOL). Typically, more than 8,000 data points are measured across a wafer, and the data are decomposed into an intra-field focus map, which captures the across chip focus variation (ACFV), and an inter-field focus map, which describes the across wafer focus variation (AWFV). ACFV and AWFV are then analyzed to understand various components in the overall focus error, including; across slit lens image field, reticle shape and dynamic scan components, local wafer flatness, wafer processing effect, pattern density, and edge die abnormality. The intra-field ACFV lens component is compared with TI's ScatterLith and ASML's FOCAL techniques. Results are consistent with the predictions based on the on-board lens aberration data. Inter-field AWFV is the most interesting, due to lack of detailed understanding of the process impact on scanner focus and leveling. PSFM data is used to characterize the effect of wafer processing such as etch, deposition, and CMP on across wafer focus control. Comparison and correlation of PSFM focus mapping with the wafer height and residual moving average (MA) maps generated by the scanner's optical leveling sensors shows a good match in general. Process induced focus errors are clearly observed on wafers of significant film stack variation and/or pattern density variation. Implications on total focus control and depth of focus (DOF) requirements for 65nm mass production are discussed in this paper using a quantitative pattern yield model. The same technique can be extended to immersion lithography.
KEYWORDS: Optical proximity correction, Reticles, Optical lithography, Logic devices, Scanning electron microscopy, Prototyping, Lithography, Process modeling, Transistors, Digital signal processing
The evaluation of 'future' SRAM designs often involves aggressive patterning techniques. This is especially true for the prototyping stage of a product because the target 'production' tools are either unavailable or suffer from immature processes. This paper describes an OPC implementation method for 0.18 micrometers technology production of small SRAM cells of logic gate levels. A model based proximity correction has been applied to compensate the pattern distortions encountered in DUV lithography patterning. The first step is to generate a process specific empirical model for OPC simulation. To judge the accuracy of the OPC model, a set of linewidth measurements including linewidth versus pitches and linewidth versus linearity could be used to do a model prediction verification. However, linewidth confirmation is only in 1D. A 2D confirmation is important to ensure the success of OPC because there are lots of irregularly shaped layouts in a random logic device. The validity of OPC model prediction also needs to be verified for low contrast areas in patterning using focus exposure matrices by comparing the printed result to the model simulation. This procedure is very important in pushing chip density. Some experimental result from our approaches are discussed in this paper.
Antireflective coatings (ARCs) have been used to enhance IC lithography for years, however, many conventional bottom ARCs can no longer maintain acceptable linewidth control, cannot meet stringent deep-UV (DUV) photoresist processing requirements, and increase the etch complexity. In this paper, we report the development of an inorganic ARC for DUV lithography in sub-0.25 micrometer advanced device applications. Plasma-enhanced chemical vapor deposition (PECVD) is employed to deposit a dielectric film silicon oxynitride (SixOyNz) with specific optical properties. The three optical parameters of the SixOyNz film: refractive index n, extinction coefficient k, and thickness d are specifically designed to ensure that the reflection light that passes through the ARC/substrate is equal in amplitude and opposite in phase to the reflected light from the resist/ARC interface. The reflection light is canceled by destructive interference and therefore photoresist receives the minimum substrate reflection wave. Using this technique, we have successfully patterned features at 0.25 micrometer and below. The dielectric film can not only function as an ARC layer, but also serve as a hardmask for the pattern transfer etch process. With an aggressive etch bias process, linewidths down to 0.60 micrometer poly-Si gate are achieved with good linewidth control (3(sigma) less than 12 nm) and a near perfect linearity. For the marginal metal etch resistance of DUV photoresist, the designed SixOyNz is effective in imparting more etch resistance and suppressing metal substrate reflection. Excellent optical uniformity of the n, k and thickness d of the SixOyNz ARC is obtained with a manufacturable PECVD deposition process.
It is well known that chemically amplified positive tone DUV resists are sensitive to substrate contamination, manifesting themselves as a 'foot' on TiN substrates. Studies have proposed that there is an interaction between nitrogen used in the formation of the TiN and the chemically amplified resist. This reaction occurs when the acid generated in the resist is neutralized by nitrogen and hence a foot is formed. However, the 'foot' abnormality of DUV resist over TiN substrates has not been fully understood or eliminated. In this paper, we study the performance of 0.25 mm features using Shipley's UVIIHS resist on a TiN/metal layer. When UVIIHS was initially evaluated the primary problem was the presence of a 'foot' at the bottom of the resist line. Subsequent studies were conducted on the effects of TiN thickness and composition. The results show the TiN thickness has little effect on the 'foot' while the TiN composition has a profound effect. As the N content in the TiN film increases the size of the food decreases. The foot decreases significantly when a very low nitrogen concentration is used and eliminated completely when using a barrier layer of 100 Ang Ti. Our results also demonstrate that surface pre-treatment of TiN using oxygen plasma can result in good 0.25 mm resist profiles with no noticeable foot present. The results we obtained indicate that chemical and physical properties of the TiN surface play a critical role in DUV resist performance. Therefore multiple spectroscopies have been employed to characterize TiN films including Rutherford backscattering, x-ray photoelectron, and time of flight secondary ion mass. These analysis provide many insights into the mechanism of the resist 'foot' phenomenon.
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