KEYWORDS: Semiconducting wafers, Sensors, Chemical mechanical planarization, Scanners, Back end of line, Monochromatic aberrations, Calibration, Process control, Front end of line, Etching
The understanding of focus variation across a wafer is crucial to CD control (both ACLV and AWLV) and pattern fidelity on the wafer and chip levels. This is particularly true for the 65nm node and beyond, where focus margin is shrinking with the design rules, and is turning out to be one of the key process variables that directly impact the device yield. A technique based on the Phase-Shift Focus Monitor (PSFM) is developed to measure realistic across-wafer focus errors on materials processed in actual production flows. With this technique, we are able to extract detailed across-wafer focus performance at critical pattern levels from the front end of line (FEOL) all the way through the back end of line (BEOL). Typically, more than 8,000 data points are measured across a wafer, and the data are decomposed into an intra-field focus map, which captures the across chip focus variation (ACFV), and an inter-field focus map, which describes the across wafer focus variation (AWFV). ACFV and AWFV are then analyzed to understand various components in the overall focus error, including; across slit lens image field, reticle shape and dynamic scan components, local wafer flatness, wafer processing effect, pattern density, and edge die abnormality. The intra-field ACFV lens component is compared with TI's ScatterLith and ASML's FOCAL techniques. Results are consistent with the predictions based on the on-board lens aberration data. Inter-field AWFV is the most interesting, due to lack of detailed understanding of the process impact on scanner focus and leveling. PSFM data is used to characterize the effect of wafer processing such as etch, deposition, and CMP on across wafer focus control. Comparison and correlation of PSFM focus mapping with the wafer height and residual moving average (MA) maps generated by the scanner's optical leveling sensors shows a good match in general. Process induced focus errors are clearly observed on wafers of significant film stack variation and/or pattern density variation. Implications on total focus control and depth of focus (DOF) requirements for 65nm mass production are discussed in this paper using a quantitative pattern yield model. The same technique can be extended to immersion lithography.
Gate CD control is crucial to transistor fabrication for advanced technology nodes at and beyond 65 nm. ACLV (across chip linewidth variation) has been identified as a major contributor to overall CD budget for low k1 lithography. In this paper, we present a detailed characterization of ACLV performance on the latest ASML scanner using Texas Instruments proprietary scatterometer based lens fingerprinting technique (ScatterLith). We are able to decompose a complex ACLV signature including patterns placed in both vertical and horizontal directions and trace the CD errors back to various scanner components such as lens aberrations, illumination source shape, dynamic image field, and scan synchronization. Lithography simulation plays an important role in bringing together the wafer and tool metrology for direct correlation and providing a quantitative understanding of pattern sensitivity to lens and illuminator errors for a particular process setup. A new ACLV characterization methodology is enabled by combining wafer metrology ScattereLith, scanner metrology and lithography simulation. Implementation of this methodology improves tool-to-tool matching and control on ACLV and V-H bias across multiple scanners to meet tight yield and speed requirements for advanced chip manufacturing.
Although lithography equipment and alignment capabilities have evolved significantly since the early stepper days of the 1980’s, the techniques for generating overlay mix and match matrices have remained virtually unchanged. The underlying assumption for traditional mix and match matrices is that the lens signature is the dominant influence in total overlay, and that metrology errors need to be averaged out of the raw data. As step and scan systems were introduced in mid 1990s, improved lens quality has reduced the lens signature errors significantly. However, improvements in stepping accuracy and precision did not keep pace with the rapid reduction in lens distortions. As a result, lens distortion signatures, combined with stepping and scanning repeatability issues, render the traditional “lens distortion matrix” methods for generating mix and match matrices invalid. In this paper several metrology sampling layouts were generated, and demonstrated that with appropriate sampling across known degrees of freedom, it is possible to create a mix and match matrix and modeling more appropriate for 65 nm node alignment tolerances. The mix and match approach captures worst case overlay errors in the matching matrix, and also identifies the root causes of the mix and match error sources between scanners.
The ability to accurately, quickly and automatically fingerprint the lenses of advanced lithography scanners has always been a dream for lithographers. This is truly necessary to understand error sources of ACLV, especially when the optical lithography is pushed into 130 nm regimes and beyond. This dream has become a reality at Texas Instruments with the help of scatterometry. This paper describes the development and characterization of the scatterometer based scanner lens testing technique (ScatterLith) and its application in 193 nm and 248 nm scanner lens fingerprinting. The entire procedure includes a full field exposure through focus in a micro stepping mode, scatterometer measurement of focus matrix, image field analysis and mapping of lens curvature, astigmatism, spherical aberration, line-through pitch analysis and ACLV analysis (i.e. across chip line width variation). ACLV has been directly correlated with image field deviation, lens aberration and illumination source errors. Examples are given to illustrate its applications in accurate focus monitoring with enhanced capability of dynamic image field and lens signature mapping for the latest ArF and KrF scanners used in manufacturing environment for 130nm node and beyond. Analysis of CD variation across a full scanner field is done through a step-by-step image field correction procedure. ACLV contribution of each image field error can be quantified separately. The final across slit CD signature is further analyzed against possible errors from illumination uniformity, illumination pupil fill, and higher order projection lens aberrations. High accuracy and short cycle time make this new technique a very effective tool for in-line real time monitoring and scanner qualification. Its fingerprinting capability also provides lithography engineers a comprehensive understanding of scanner performance for CD control and tool matching. Its extendibility to 90nm and beyond is particularly attractive for future development and manufacturing requirements.
As the dimensions of devices shrink and the processing of new devices gets more complex, the requirements for overlay are becoming tighter. Many process elements and previously unmodeled components now dominate the total overlay budget; such as reticle error, alignment-mark quality and design, tool control, alignment system setup and alignment sampling layout, etc. Unmodeled errors (RMSE) consume a larger percentage of the total overlay as the tolerances become tighter. The strategy pursued was to reduce the contribution of each of these elements to as small as possible. In this paper, an improved sampling method is introduced to optimize the sampling layouts in order to minimize RMSE in alignment modeling solutions. The applications of these optimized sampling layouts in both production and system maintenance are also introduced.
Tool cost of ownership and manufacturing productivity continue to be key factors in equipment selection discussions. Products that differentiate themselves by maximizing tool utilization and minimizing engineering resources make the best economic impact in a time of increasing fab capital costs. This paper will demonstrate the use of a single off-line recipe database manager (RDM) in conjunction with multiple optical misregistration measurement tools for the purpose of misregistration recipe creation and management in a high volume ASIC manufacturing line. A strategy for minimizing the number of recipe elements and the amount of time required to create and maintain all recipes will be discussed. Data will be presented which demonstrates significant reduction in tool time required for recipe setup, leading directly to increased tool availability for production use. In addition, the RDM allows for standardization of misregistration measurement setup for similar process levels across multiple product devices within a single product family. Data will be shown demonstrating TIS stability and consistency as a result of the standardized setup. Future work, including fully automated recipe creation via CAD output data would be discussed.
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