Contour detection of an object is a fundamental computer vision problem in image processing domain. The goal is to find a concrete boundary for pixel ownership between an OOI (object-of-interest) and its corresponding background. However, contour extraction from low SN SEM images is a very challenging problem as different sources of noise shadow the estimation of underlying structural geometries. As device scaling continues to 3nm node and below, the extraction of accurate CD contour geometries from SEM images especially ADI (after developed inspection) is of utmost importance for a qualitative lithographic process as well as to verify device characterization in aggressive pitches. In this paper, we have applied a U-Net architecture based unsupervised machine learning approach for de-noising CD-SEM images. Unlike other discriminative deep-learning based de-noising approaches, the proposed method does not require any ground-truth as clean/noiseless images or synthetic noiseless images for training. Simultaneously, we have also attempted to demonstrate how de-noising is helping to improve the contour detection accuracy. We have analyzed and validated our result by using a programmable tool (SEMSuiteTM) for contour extraction. We have de-noised SEM images with categorically different geometrical patterns such as L/S (line-space), T2T (tip-to-tip), pillars with different scan types etc. and extracted the contours in both noisy and de-noised images. The comparative analysis demonstrates that de-noised images have higher confidence contour metric than their noisy twins while keeping the same parameter settings for both data input. When the ML algorithm is applied, the contour extraction results would have higher confidence numbers comparing with the ones only applied the conventional Gaussian or Median blur de-noise method. The final goal of this work is to establish a robust de-noising method to reduce the dependency of SEM image acquisition settings and provide more accurate metrology data for OPC calibration.
KEYWORDS: Optical proximity correction, Electron beam lithography, 3D modeling, Inspection, Calibration, Lithography, Data modeling, Time metrology, Semiconducting wafers, Scanning electron microscopy
A method to perform Optical Proximity Correction (OPC) model calibration that is also sensitive to lithography failure modes and takes advantage of the large field of view (LFoV) e-beam inspection, is presented. To improve the coverage of the OPC model and the accuracy of the after development inspection (ADI) pattern hotspots prediction - such as trench pinching or bridging in complex 2D routing patterns - a new sampling plan with additional hotpot locations and the corresponding contours input data is introduced. The preliminary inspected hotspots can be added to the traditional OPC modeling flow in order to provide extra information for a hotspot aware OPC model. A compact optical/resist 3D modeling toolkit is applied to interpret the impact of photoresist (PR) profiles, as well as accurate predictions of hotspot patterns occurring at the top or bottom of the PR. A contour-based modeling flow is also introduced that uses a site or edge based calibration engine, to better describe hotspot locations in the hotspot aware OPC model calibration. To quantify the improvement in pattern coverage in the modeling flow, feature vectors (FVs) analysis and comparisons between the conventional and the hotspot aware OPC models is also presented.[1] The time and cost of using conventional Critical Dimension Scanning Electron Microscope (CD-SEM) metrology to measure such a large amount of CD gauges are prohibitive. By contrast, using LFoV e-beam inspection with improved training algorithm to extract fine contours from wafer hotspots, a hotspot aware OPC model can predict ADI hotspots with a higher capture rate as compared to main feature OPC model. Presumably, a hotspot-aware modeling flow based on LFoV images/contours not only benefits users by improving the capture rate of the lithography defects, but also brings the advantages to the failure mode analysis for the post-etch stage.
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