Multiple contact hole resist samples from a variety of DUV resist suppliers, including both acetal and ESCAP chemistries are evaluated on an organic anti-reflective under layer (ARC) using an attenuated phase shift mask (APSM). One sample exhibited excellent surface inhibition and superior lithographic performance for patterning contact holes of 0.2 micrometers imaging size. For most of resists, the process windows are limited by unwanted sidelobe printing through focus. The sensitivity of sidelobe printing to focus can be attributed to lens aberrations. For the first time, we prose to use Depth-of-focus (DOF) loss PWLdof and Exposure latitude (EL) loss PWLel to characterize resists surface inhibition, as well discovered that DOF loss is a sensitive measure of surface inhibition. Similar lithographic performance is obtained from acetal and ESCAP based materials. The two ESCAP resists EB3 and EA2 have better oxide etch resistance than the acetal resist AC1. The top surface reticulation is observed on ESCAP resist EB3 and EA2 during the oxide etch, but not on the acetal resist AC1. 110 nm underexposed resolutions achieved with the resist EA4 at a mask size of 250 nm. Faster resists generally exhibit better resolution but have smaller process windows when side lobe printing is included as a criterion. Selection of a resist formulation for attenuated phase shift applications has to face a compromise between resolution, photospeed, process window and surface inhibition. Finally, ARC operational modes and optical properties had little effect on sidelobe printing, and optimization of PEB temperature is important in suppressing sidelobe printing.
This new photoresist system extends the capability of the ESCAP platform previously discussed. (1) This resist material features a modified ESCAP type 4-hydroxystyrene-t-butyl acrylate polymer system which is capable of annealing due to the increased stability of the t-butyl ester blocking group. The resist based on this polymer system exhibits excellent delay stability and enhanced etch resistance versus previous DUV resists, APEX and UV2HS. Improved stabilization of chemically amplified photoresist images can be achieved through reduction of film volume by film densification. When the host polymer provides good thermal stability the soft bake conditions can be above or near the Tg (glass transition) temperature of the polymer. The concept of annealing (film densification) can significantly improve the environmental stability of the photoresist system. Improvements in the photoacid generator, processing conditions and overall formulation coupled with high NA (numerical aperture) exposure systems, affords linear lithography down to 0.15 micrometer for isolated lines with excellent post exposure delay stability. In this paper, we discuss the UV4 and UV5 photoresist systems based on the ESCAP materials platform. The resist based on this polymer system exhibits excellent delay stability and enhanced etch resistance versus APEX-E and UV2HS. Due to lower acrylate content, the Rmax for this system can be tuned for feature-type optimization. We demonstrate sub-0.25 micrometer process window for isolated lines using these resists on a conventional exposure tool with chrome on glass masks. We also discuss current use for various device levels including gate structures for advanced microprocessor designs. Additional data will be provided on advanced DRAM applications for 0.25 micrometer and sub-0.25 micrometer programs.
The traditional lithographic approach employed by the semiconductor industry has been to pursue use of advanced prototype optical exposure tools and resists. The benefits of doing so have been: (1) The lithographic process that is used in development more closely resembles the process that will in fact be used to manufacture the chip. (2) The cost of low K1 imaging (phase-masks, off-axis illumination, and surface imaging resist) can be avoided. However with the introduction of 1Gb-dynamic random access memory (DRAM) development, a paradigm shift is being experienced within the optical lithographic community. With 1Gb-DRAMs, the minimum feature size falls irreversibly below the optical wavelength used to image the feature. Such a situation will make low K1 factor imaging unavoidable. With 175 nm groundrules typical for first generation 1G-DRAMs, K1 factors near 0.4 will be common with 0.5 as an upper limit on advanced systems currently in development irrespective of optical wavelength. This paper will cover the selection process, experimental data, and problems encountered in defining and integrating the lithographic process used to support the critical mask levels on 1Gb-DRAM development. Factors considered include: resist, masks, and illuminations via both simulation and experiment. The simulations were conducted with both internal and externally developed software. The experimental data to be reviewed was generated using an experimental 0.6 NA KrF step and scan system provided by Nikon. The resist used is commercially available from the Shipley corporation.
As the competitive pressures of the semiconductor industry drive to feature sizes below 250 nanometer, unconventional imaging approaches are being considered in order to preserve the cost effectiveness of optical lithography. To achieve minimum feature size with a usable process window, phase shift masks, off-axis illumination, and ArF lithography have been investigated with varying degrees of success. Unfortuanely, the maturity and flexibility of such techniques are questionable at this time. This paper investigates the extendibilty of traditional imaging approaches for use in the sub 250 nanometer regime. Aerial image simulations were used to set expectation levels by increasing lens numerical aperture versus prior state of the art exposure systems. Experimental data was then generated with an advanced 0.6 NA excimer laser based step and scan exposure system. Single point per field comparisons are made between simulations and experimental data covering linearity, depth of focus, and exposure dose window for feature sizes between 250 nanometers and 200 nanometers. In addition, data reviewing the ability to extend such performance across a 25 mm by 33 mm field size is reviewed.
At low k1 factors, optical proximity correction (OPC) is used to correct line size such that what is delivered by the lithography process is closer to the design dimension than an uncorrected process would deliver. OPC is usually derived for perfect masks and exposures. Random variation of the mask critical dimension (CD), wafer exposure latitude, and wafer defocus are examined for their effects on an OPC mask. Expected CD variation in the aerial image is given for each of these variables. Examining these variables will also give insight as to how fine an OPC can realistically be obtained, and how fine a grid size is needed in the manufacture of the mask.
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