We studied spin properties of Ge heterostructures by optical orientation and Hanle measurements. The circular
polarization of the direct gap photoluminescence is shown to exceed the theoretical bulk limit, yielding about 37% and
85% for transitions with heavy and light holes, respectively. The energetic proximity of Γ and L valleys and ultrafast
scattering of electrons from Γ to L states allowed us to resolve the spin dynamics of holes and to observe the polarization
of electrons after scattering to L valleys. The spin relaxation analysis indicates that the spin lifetime of electrons exceeds
5 ns below 150 K, whereas it is in the 500 ps range for holes.
We present a methodology to systematically and analytically treat phonon-induced spin relaxation of conduction
electron in silicon. All leading order contribution from all phonon modes and scattering processes are considered
and the results for spin-flip matrix elements and spin lifetime are summarized. We show the explicit dependence
of matrix elements on the electron wavevectors, spin orientation and phonon polarization. These results are
shown to be powerful especially under symmetry-breaking conditions when an averaging rough evaluation of the
matrix elements is not sufficient. Corrections due to the special two-band degeneracy in the X point (near the
conduction valley minima) are also discussed. Numerical calculation are used to confirm the analytical results.
This paper presents a novel design concept for spintronic nanoelectronics that emphasizes a seamless integration
of spin-based memory and logic circuits. The building blocks are magneto-logic gates based on a hybrid
graphene/ferromagnet material system. We use network search engines as a technology demonstration vehicle
and present a spin-based circuit design with smaller area, faster speed, and lower energy consumption than the
state-of-the-art CMOS counterparts. This design can also be applied in applications such as data compression,
coding and image recognition. In the proposed scheme, over 100 spin-based logic operations are carried
out before any need for a spin-charge conversion. Consequently, supporting CMOS electronics requires little
power consumption. The spintronic-CMOS integrated system can be implemented on a single 3-D chip. These
nonvolatile logic circuits hold potential for a paradigm shift in computing applications.
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