Overlay metrology plays a significant role in process and yield control for integrated circuit (IC) manufacturing. As the On-Product Overlay (OPO) in advance nodes is reduced to a few nanometers, a very small margin is left for measurement inaccuracy. We introduce a multi-wavelength (spectral) analysis and measurement method, capable of characterizing overlay inaccuracy signatures on the wafer, and quantifying and removing the inaccuracy portion of the overlay measurement, resulting in a more accurate measurement, better process control, and yield enhancement. This method was applied to SK hynix’s advanced process production wafers, demonstrating an enhancement in accuracy over single-wavelength based overlay measurements.
On-product overlay (OPO) challenges are quickly becoming yield limiters for the latest IC technology nodes, requiring new and innovative solutions to meet the technology demands. One of the primary means for reducing OPO error is the measurement of the grid (on target) at after-develop inspection (ADI) correctly and accurately. To reduce the optical error in the measurement, signals from both high voltage scanning electron microscope (HV-SEM) technology and imaging based overlay (IBO) measurements at ADI can be leveraged. Using key performance indicators (KPIs) and information produced by multiple optical measurement conditions, it is possible to optimize SEM sampling across the wafer and to capture all relevant target deformations. The objective is to improve the accuracy of optical measurements by efficiently combining information from HV-SEM and optical metrology systems. This paper will demonstrate that the information extracted from electron-based metrology and IBO measurements can be used for direct measurement of target deformations, which feeds into advanced optical target diagnostics and utilized for de-correlation between asymmetries and overlay (OVL).
On product overlay (OPO) challenges are quickly becoming yield limiters for the latest technology nodes, requiring new and innovative metrology solutions. In this paper we will cover current and future overlay trends in logic and memory device processing. We will review new lithography overlay challenges and node-after-node trends in the OPO error budget for advanced logic, DRAM, and 3D NAND devices. The central question of this paper is whether optical overlay metrology can keep up with challenges that include accuracy, intra-field variability, target-to-device offset, and others. After surveying the two dominant technologies in optical overlay metrology (IBO and SCOL®), we will outline innovative solutions that will help to address metrology challenges for the new device nodes.
In recent years, lithographic printability of overlay metrology targets for memory applications has emerged as a significant issue. Lithographic illumination conditions such as extreme dipole, required to achieve the tightest possible pitches in DRAM pose a significant process window challenge to the metrology target design. Furthermore, the design is also required to track scanner aberration induced pattern placement errors of the device structure. Previous workiii, has shown that the above requirements have driven a design optimization methodology which needs to be tailored for every lithographic and integration scheme, in particular self-aligned double and quadruple patterning methods. In this publication we will report on the results of a new target design technique and show some example target structures which, while achieving the requirements specified above, address a further critical design criterion – that of process resilience.
Femtosecond laser ablation occurs on timescales faster than the thermalization of the excited electrons and the lattice in solid materials. The ultrafast deposition of energy competes with the slower electron-phonon energy redistribution, raising the question of what is the optimal pulse duration for efficient deposition of energy while minimizing peripheral damage, and whether the shortest pulse is always the most efficient. We studied femtosecond laser ablation of silicon and several metals, varied the pulse duration while keeping all other parameters equal, and looked for optimal conditions. The main findings in our study are that at low fluences, not too high above the ablation threshold, the shortest pulses are the most efficient, whereas under high fluence conditions, well above the ablation threshold, longer pulses ablate more efficiently. In order to facilitate eventual direct, real time optimization, we developed a diagnostics tool for the monitoring of the ablation efficiency over a wide range of pulse durations. The intensity of the emission at atomic lines (i.e. the 289 nm line in Silicon, calibrated by plasma emission at other wavelengths) provides such information, while optical and AFM microscopy provide reliable information about the quality of ablated structures.
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