The characterization and optimization of the stacked-PN junction photodiodes structure for energy harvesting CMOS
image sensor is presented. The proposed structure has three desired PN junctions located along a vertical line. With
proper connection, these PN junctions can provide high voltage or large current for the different load conditions. They
also improve the energy harvesting efficiency compared with the conventional single PN junction. Theoretical analysis
and optimizations of this structure are given in the paper as well as the simulation results.
The design and optimization of an integrated pixel for the energy-harvesting CMOS image sensor on SOI technology
is presented. The pixel works in energy-harvesting mode and imaging mode. A thick-film SOI process is used to
implement the photodiodes so that more solar energy and illumination information could be collected than with the
thin-film SOI process for the deeper depletion area. Benefitting from the isolation technology of SOI process, the
photodiodes do not share substrate anymore. In the harvesting mode, several photodiodes could be connected in series to
generate higher voltage as a power supply. The charge speed under the light with different wave length and power
density is simulated. The generated voltage is equal to 1.91V under the light with 330nm wave length and 0.6W/cm2
power density.
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