This study investigates the feasibility of a reactively sputtered thin nickel oxide film for application to a
microbolometer. The properties of the developed thin nickel oxide film depend on the sputter process parameters. The
measured resistivity of the nickel oxide films ranges from 0.3 Ωcm to approximately 50 Ωcm. Negative Temperature
Coefficient of Resistance (TCR) values as high as -3.3%/ °C were acquired. The feasible 1/f noise characteristic was also
measured. The magnification of the TCR value and 1/f noise of the nickel oxide films was proportional to the resistivity
of the nickel oxide films. Specifically, nickel oxide film with a high resistivity showed a higher TCR value and more 1/f
noise. From the measured TCR and 1/f noise values, the theoretically calculated NETD showed a value suitable for use
with a microbolometer. Additionally, an analysis of sputtered thin nickel oxide films was conducted through X-ray
diffraction.
The function of most readout integrated circuits (ROIC) for microbolometer focal plane arrays (FPAs) is supplying a
bias voltage to a microbolometer of each pixel, integrating the current of a microbolometer, and transferring the signals
from pixels to the output of a chip. However, the scale down of CMOS technology allows the integration of other
functions. In this paper, we proposed a CMOS ROIC involving a pixel-level analog-to-digital converter (ADC) for 320
× 240 microbolometer FPAs. Such integration would improve the performance of a ROIC at the reduced system cost
and power consumption. The noise performance of a microbolometer is improved by using the pixelwise readout
structure because integration time can be increased up to 1ms.
A Pixel circuit is consisted of a background skimming circuit, a differential amplifier, an integration capacitor and a 10-bit DRAM. First, the microbolometer current is integrated for 1ms after the skimming current correction. The
differential amplifier operates as an op-Amp and the integration capacitor makes negative feedback loop between an
output and a negative input of the op-Amp. And then, the integrated signal voltage is converted to digital signals using a
modified single slope ADC in a pixel when the differential amplifier operates as a comparator and the 10-bit DRAM
stores values of a counter. This readout circuit is designed and fabricated using a standard 0.35μm 2-poly 3-metal
CMOS technology.
An uncooled capacitive type bimaterial infrared detector with high fill-factor and improved noise characteristic is
investigated. Top electrode is insulated from the substrate thermally as well as electrically. Only small dimension
(10μmx2μmx0.2μm) of SiO2 only layer (thermal insulation leg) assures thermal conductance of 1.06x10-7W/K, while keeping the infrared absorber (top electrode) separated from the bias signal. Due to the decreased thermal isolation leg length, high fill-factor of 0.77 is achieved. The bimaterial leg that connects the infrared absorber to the thermal insulation leg is a 38μm long cantilever structure composed of Al and SiO2 bi-layer, which has large difference in the thermal expansion coefficient (Al:25ppm/K and SiO2:0.35ppm/K). Bimaterial leg length (38μm) is quite shorter than the
previously designed device, resulting in the decreased bending of the bimaterial leg. However, the increased fill-factor
reduces temperature fluctuation noise term that is inversely proportional to the absorber area, and it is found by FEM
simulation that the enhanced mechanical properties such as spring constant reduce the thermo-mechanical noise term of
the proposed device.
By adopting new capacitance reading scheme, a capacitive type uncooled infrared detector structure with high fill-factor
and effectively controllable thermal conductance is proposed. Instead of conventional MEMS capacitor structure (i.e. an
insulating gap between top and bottom electrodes), a capacitor with a floating electrode and two bottom electrodes has
been applied to the infrared detector. Infrared absorber which also acts as the floating electrode of the capacitor is
connected to the substrate via two bimaterial legs. These legs consist of two materials having large difference in thermal
expansion coefficient (Al: 25ppm/K and SiO2: 0.35ppm/K), so that the legs are deflected according to the certain
temperature change due to the infrared absorption. This leg's movement results in the displacement of the top electrode
of the capacitor, and infrared is sensed by measuring the capacitance change. However, the one end tip of the bimaterial
leg does not contain Al and consist of SiO2, solely. This leg design enables the absorber to be separated from the
substrate thermally as well as electrically, because insulators usually have low thermal conductivity than metals more
than an order. The capacitance change by the result of infrared absorption is read only through two bottom electrodes
which are placed right under the absorber, and also perform as infrared reflectors. The design has advantages of
enlarging fill-factor of the infrared detector, effective thermal conductance controlling and high sensitivity to IR. With
only small dimensions of SiO2 (10μm x 2μm x 0.2μm), the device can have low thermal conductance of 1.3x10-7W/K,
so that the portion of the legs can be reduced in a pixel area. The device has fill-factor of 0.77 and 14%/K of sensitivity
to infrared rays concerning 1~2K of temperature difference between the structure and the substrate.
In this paper, a novel high SNR readout circuit for a satellite TDI array is presented. Since an input range of an IR image for environmental satellites is broad and especially the cloud top temperature (CTT) that is important in understanding phenomena of atmosphere is quite low, the readout of low temperature signal is important in satellite applications. However, the noise resulted from a readout circuit is no longer ignorable compared to a detector shot noise at low IR radiation. Hence, an adaptive charge capacity control method is proposed in this paper for an improved SNR at low temperature. It is found that SNR is improved as much as 11dB at 200K and 90% background-limited infrared photodetection (BLIP) condition is satisfied over a total input range by simulation.
KEYWORDS: Microbolometers, Capacitors, Readout integrated circuits, Amplifiers, Digital signal processing, CMOS technology, Signal processing, Digital electronics, Capacitance, Device simulation
Pixelwise integrated circuits involving a pixel-level analog-to-digital converter (ADC) are studied for 320 × 240
microbolometer focal plane arrays (FPAs). It is necessary to use the pixelwise readout architecture for decreasing the
thermal noise. However, it is hard to locate a sufficiently large integration capacitor in a unit pixel of FPAs because of
the area limitation. To effectively overcome this problem, a two step integration method is proposed.
First, after integrating the current of the microbolometer for 32&mgr;s, upper 5bits of the 13bit digital signal are output
through a pixel-level ADC. Then, the current of the microbolometer is integrated during 1ms after the skimming current
correction using upper 5bits in a field-programmable gate array (FPGA), and then lower 8bits are obtained through a
pixel-level ADC. Finally, upper 5bits and lower 8bits are combined into the digital image signal after the gain and offset
correction in digital signal processor (DSP)
Each 2×2 pixel shares an readout circuit, including a current-mode background skimming circuit, an operational
amplifier(op-Amp), an integration capacitor and a single slope ADC. When the current of a microbolometer is
integrated, the integration capacitor is connected between a negative input and an output of the op-Amp. Therefore a
capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. When the
output of a microbolometer is converted to digital signal, the Op-Amp is used as a comparator of the single slope ADC.
This readout circuit is designed to achieve 35×35&mgr;m2 pixel size in 0.35&mgr;m 2-poly 3-metal CMOS technology.
We have developed a microbolometer readout integrated circuit (ROIC) that corrects the non-uniformity in analog operation and acts in both normal mode and edge detection mode. A capacitive transimpedance amplifier (CTIA) has been employed as the input circuit of the microbolometer. Generally, when fabricating microbolometer focal plane arrays (FPAs), offset-error and gain-error in the inter-microbolometer are induced by fabrication error. They are shown as fixed pattern noise (FPN) in the infrared image. In the present study, a circuit correcting the offset-error and the gain-error in the normal mode by controlling the bias and the integration capacitance of the CTIA is proposed. This circuit does not require an additional DSP chip, and the non-uniformity is corrected before the analog to digital conversion (ADC). Thus, it can utilize 3-4 bits lower ADC compared to the conventional readout circuit. In the edge detection mode, after correcting the gain-error in two adjacent pixels, edge detection can be realized by subtracting their signal without the DSP. We have designed the suggested circuit to output a 10bit level effective infrared signal using 0.35um 2-poly 3-metal CMOS technology.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.