Electronics has been the nation’s largest and fastest growing manufacturing industry
throughout the end of the last century. Semiconductors have fueled that growth , even
with the downturn in the past two years. The US semiconductor industry now has the
largest value-added of any US manufacturing sector, comprising almost 1 percent of
US gross domestic product (GDP). In 2001 US-based firms accounted for
approximately 52% of the $140-billion world semiconductor market, and the
electronics industry employs more than 2 million Americans. This growth has been
sustained through steady advancements in semiconductor manufacturing science and
technology. These strategies have lead to increasingly cost effective advanced
communications and information technologies.
A new fabrication process flow is being developed for X-ray lithography masks to simplify the wafer bonding procedure while allowing for the use of a standard, non-distortive mount in the e-beam tool. A conventional flow includes a support ring that is anodically-bonded to the mask wafer prior to writing the pattern in the e-beam tool. The new flow includes a support ring that is bonded to the mask wafer at a “single point” after the pattern is written. Because mask membrane distortions due to fabrication, pattern transfer, and mounting give rise to image placement errors on the device wafer, this research focused on the impact the new process flow has on mask membrane distortions in comparison to those that result from a conventional process flow. The resulting simulations showed that distortions that lead to image placement errors decrease when employing the new fabrication process. The results also illustrate that mechanical modeling provides an invaluable tool for quantifying image placement errors, and, ultimately, optimizing the system parameters to successfully meet the stringent error budgets at the 45-nm node (and below).
In 1994, The National Technology Roadmap for Semiconductors was revised, updated to reflect the latest information, and published in December 1994. Lithography continues to be a cornerstone for semiconductor process and productivity. The roadmap activity is sponsored by the SIA. The Technical Working Group (TWG), which does the actual work of updating the roadmap, is comprised of members from SEMATECH, SEMATECH FTABs, SRC, industry, universities and government. One of SEMATECH's key goals is to insure that the activities we pursue are well-aligned to the roadmap. The roadmap is focused on requirements and needs of the industry. SEMATECH is focused on solutions. The lithography roadmap makes clear the desire of semiconductor manufacturers to stay with optics as long as possible since shifts to non-optical technology are viewed as much higher investment and risk. It is perceived that optics can be a viable manufacturing solution through at least the 0.18 micrometers generation. The TWG and SEMATECH FTAB meetings highlighted the need for greatly increased emphasis and resources on 193 nm technology to bring it to pilot production in 1998 for the 0.18 micrometers generation. SEMATECH has since worked with the industry to define more detailed needs and requirements for a successful 193 program and is working with industry and the government to insure that the technology is available when needed in manufacturing. The needs are clear...cost-effective lithography for each generation. The challenges are...how to get there from here.
In 1994, The National Technology Roadmap for Semiconductors was revised, updated to reflect the latest information, and published in December 1994. Lithography continues to be a cornerstone for semiconductor process and productivity. The roadmap activity is sponsored by the SIA. The Technical Working Group (TWG), which does the actual work of updating the roadmap, is comprised of members from SEMATECH, SEMATECH FTABs, SRC, industry, universities and government. One of SEMATECH's key goals is to insure that the activities we pursue are well-aligned to the roadmap. The roadmap is focused on requirements and needs of the industry. SEMATECH is focused on solutions. The Lithography roadmap makes clear the desire of semiconductor manufacturers to stay with optics as long as possible since shifts to nonoptical technology are viewed as much higher investment and risk. It is perceived that optics can be a viable manufacturing solution through at least the 0.18 micrometers generation. The TWG and SEMATECH FTAB meetings highlighted the need for greatly increased emphasis and resources on 193 nm technology to bring it to pilot production in 1998 for the 0.18 micrometers generation. SEMATECH has since worked with the industry to define more detailed needs and requirements for a successful 193 program and is working with industry and the government to insure that the technology is available when needed in manufacturing. The needs are clear...cost-effective lithography for each generation. The challenges are...how to get there from here.
In 1994, The National Technology Roadmap for Semiconductors was revised, updated to reflect the latest information, and published in December 1994. Lithography continues to be a cornerstone for semiconductor process and productivity. The roadmap activity is sponsored by the SIA. The Technical Working Group (TWG), which does the actual work of updating the roadmap, is comprised of members from SEMATECH, SEMATECH FTABs, SRC, industry, universities and government. One of SEMATECH's key goals is to insure that the activities we pursue are well-aligned to the roadmap. The roadmap is focused on requirements and needs of the industry. SEMATECH is focused on solutions. The Lithography roadmap makes clear the desire of semiconductor manufacturers to stay with optics as long as possible since shifts to non-optical technology are viewed as much higher investment and risk. It is perceived that optics can be a viable manufacturing solution through at least the 0. 1 8uni generation. The TWG and SEMATECH FTAB meetings highlighted the need for greatly increased emphasis and resources on 193nm technology to bring it to pilot production in 1998 for the 0.1 8um generation. SEMATECH has since worked with the industry to define more detailed needs and requirements for a successful 193 program and is working with industry and the government to insure that the technology is available when needed in manufacturing. The needs are clear...cost-effective lithography for each generation. The challenges are...how to get there from here.
In 1994, the National Technology Roadmap for Semiconductors was revised, updated to reflect the latest information, and published. Lithography continues to be a cornerstone for semiconductor process and productivity. The roadmap activity is sponsored by the SIA. The Technical Working Group (TWG), which does the actual work of updating the roadmap, is comprised of member from SEMATECH, SEMATECH FTABs, SRC, industry, universities, and government. One of SEMATECH's key goals is to insure that the activities we pursue are well-aligned to the roadmap. The Lithography roadmap makes clear the desire of semiconductor manufacturers to stay with optics as long as possible since shifts to nonoptical technology are viewed as much higher investment and risk. It is perceived that optics can be a viable manufacturing solution through at least the 0.18-micrometers generation. The TWG and SEMATECH FTAB meetings highlighted the need for greatly increased emphasis and resources on 193-nm technology to bring it to pilot production in 1998 for the 0.18-micrometers generation. SEMATECH has since worked with the industry to define more detailed needs and requirements for a successful 193 program and is working with industry and the government to insure that the technology is available when needed in manufacturing. The needs are clear...cost-effective lithography for each generation. The challenge is how to get there from here.
This paper sets a framework for those which follow. The National Lithography Roadmap has been enhanced in 1994 to include a systems approach to lithographic requirements. The lithography specifications at the wafer level which will be required in the manufacture of gigabit chips are described with an emphasis on critical dimension tolerances and overlay. These critical needs place stringent requirements on the total system. The National Roadmap is discussed with an emphasis on the interaction between wafer level measurements and the lithographic system requirements necessary to achieve them.
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