We report on progress towards a charge-based qubit using phosphorus atoms implanted in a silicon substrate. Prototype devices have been fabricated using standard lithographic techniques together with a new method of controlled single ion implantation using on-chip detector electrodes. Positional accuracy of the implanted ions was achieved using a nanoaperture mask defined using electron beam lithography. The two implanted phosphorus atoms are positioned ~50 nm apart, to form a qubit test device. A series of process steps has been developed to repair implant damage, define surface control gates, and to define single electron transistors used for qubit readout via the detection of sub-electron charge transfer signals. Preliminary electrical measurements on these devices show single charge transfer events that are resilient to thermal cycling.
We report recent progress in single keV ion implantation and online detection for the controlled implantation of single donors in silicon. When integrated with silicon nanofabrication technology this forms the “top down” strategy for the construction of prototype solid state quantum computer devices based on phosphorus donors in silicon. We have developed a method of single ion implantation and online registration that employs detector electrodes adjacent to the area into which the donors are to be implanted. The implantation sites are positioned with nanometer accuracy using an electron beam lithography patterned PMMA mask. Control of the implantation depth of 20 nm is achieved by tuning the phosphorus ion energy to 14 keV. The counting of single ion implantation in each site is achieved by the detection of e-/h+ pairs produced by the implanted phosphorus ion in the substrate. The system is calibrated by use of Mn K-line x-rays (5.9 and 6.4 keV) and we find the ionization energy of the 14 keV phosphorus ions in silicon to be about 3.5-4.0 keV for implants through a 5 nm SiO2 surface layer. This paper describes the development of an improved PIN detector structure that provides more reliable performance of the earlier MOS structure. With the new structure, the energy noise threshold has been minimized to 1 keV or less. Unambiguous detection/counting of single keV ion implantation events were achieved with a confidence level greater than 98% with a reliable and reproducible fabrication process.
We describe progress in a range of nanofabrication processes for the production of silicon-based quantum computer devices. The processes are based upon single-ion implantation to place phosphorus-31 atoms in accurate locations, precisely self-aligned to metal control gates. These fabrication schemes involve multi-layer resist and metal structures, electron beam lithography and multi-angled aluminium shadow evaporation. The key feature of all fabrication schemes is a gate pattern defined in a resist structure using electron beam lithography, used in conjunction with a second pattern written in another resist layer. The locations where the two patterns overlap define channels down to the substrate through which ions can be implanted, with the remaining metal/resist structure behaving as a mask. Further processing on the resist structures allows for deposition of the control gates and read-out structures. Central to this process is a new technique which allows for control of the implantation process at a single-ion level.
Access to the requested content is limited to institutions that have purchased or subscribe to SPIE eBooks.
You are receiving this notice because your organization may not have SPIE eBooks access.*
*Shibboleth/Open Athens users─please
sign in
to access your institution's subscriptions.
To obtain this item, you may purchase the complete book in print or electronic format on
SPIE.org.
INSTITUTIONAL Select your institution to access the SPIE Digital Library.
PERSONAL Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.