Scatterometry is currently being used in lithography production as an inline metrology tool to monitor wafer processing
and detect excursions. One well-documented excursion is the process variation caused by differences in resist batches.
This paper describes the use of Tokyo Electron Limited's integrated Optical Digital Profilometry (iODPTM)
scatterometry system to detect process variations caused by resist batch changes. This system was able to detect a
significant shift in resist sidewall angle (SWA) on an incoming resist batch that was undetected by the primary
metrology in use at the time, a scanning electron microscope (CD-SEM). This SWA shift correlated to an undesirable
shift in post-etch CD created by the new resist batch. Experiments performed in conjunction with the resist supplier
confirmed that the normal batch-to-batch variation of a key resist component was enough to produce a change in SWA
after processing. This validation led to quality improvement controls by the resist vendor and Qimonda and resulted in
the use of iODP as the primary metrology for this process.
This paper discusses the controls benefit accomplished on both product wafers and process tools at IBM's 300mm
wafer manufacturing line by using integrated auto-macro defect inspection in all the photolithography tool clusters
for after-develop-inspection (ADI). Inspection is supported on all production wafers (with possibility to sample
wafers if desired). To get to this level of control the overall 'ADI process' in the line had to be first rendered
manufacturable. Therefore, significant effort had to be focused towards decreasing false fails and nuisance holds.
As a result, over the last year inspection software related false fails were reduced 3X, hardware related PC
communication fails were decreased 5X, and fab automation related nuisance wafer holds were reduced 12X. Fail
rate has been sustainable at 6% (± 2%) for over two quarters. At this point only 20% of the fail rate is false and is
mostly attributable to hardware related wafer alignment issues during inspection. By decreasing false fails and hold
rates, sensitivity and effectiveness in the line towards correctly reacting to real fail signals significantly improved.
Product wafers with real fails are now consistently reacted to real-time in the line leading to rework and elimination
of photo sector generated macro defects. Contribution of this integrated metrology system to fab rework rate in
eliminating yield impacting macro defects from product wafers, as well as examples of captured defects that have
identified several process tool problems are also presented. Majority of rework contributors are defects generated
from intermittent photo process tool issues that randomly occur and disappear (versus systematic process tool issues
that typically end up being flagged within two consecutive failed lots). Typically 0.5 to 1% of the ADI inspected
wafers get reworked for macro defectivity translating to a significant number of wafers - thus justifying ADI return-on-
investment. Note that real fails as a result of defectivity propagation from prior photolevels - estimated at 15% of
the fail rate, do not get reworked. Additionally, real fails determined to be non-reworkable as a result of defectivity
from the current photolevel - estimated at 50% of the fail rate, also do not get reworked. Further, by analyzing real
fails for intra/inter wafer signatures systematic process tool issues are being consistently flagged on the line.
Overall, ADI at IBM's 300mm wafer fab has evolved into a real-time wafer level go/no-go control for both product
and process tools.
The IBM 300 mm wafer manufacturing line provides a case study for the optimization of an automated macro defect inspection system to accurately flag global wafer color variation. The IBM inspection system was falsely flagging a large number of wafers primarily for global wafer color variation, leading to unacceptable amounts of production volume being placed on hold. A review of the macro inspection system identified several areas for improvement. An investigation into the installed hardware base found a panel behind the beam splitter was introducing noise through reflected light. This panel was replaced with a less reflective material. A review of the failed wafers found that maximum light levels were not achieved across all tools and an improved diffuser plate for the fiber optic output was designed to improve light transmittance. Global wafer color is determined by comparing the scanned wafer image to a "golden" data set, referred to as a "color baselist," which is composed of data from 30 wafers. A review of the recipe baselists revealed that some of the wafer samples did not accurately represent process conditions, and new wafer samples were collected. Finally, a tool-to-tool matching test revealed that the set of weightings given to each of the color parameters in the baselists was not optimized. After implementing the above changes, false global wafer color failures were virtually eliminated.
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