This Conference Presentation, “A holistic study of edge placement error on fin cut layer in self-aligned double patterning process,” was recorded at SPIE Photonics West held in San Francisco, California, United States.
The reduction of line width and edge roughness (LWR & LER) becomes increasingly challenging with development of integrated circuit manufacturing industry, especially with the application of multi-patterning technology. Recent years, unbiased roughness method was well received and applied in LWR & LER characterization by using power spectral density (PSD) analysis. Measurement noise in scanning electron microscope (SEM) can be identified in the high frequency region of PSD curve. By subtracting electron beam noise effect, the unbiased LWR & LER are gotten. In our research, unbiased LWR & LER under different lithography process conditions, including reflectivity of bottom anti-reflection coating (BARC) materials, photo resists (PR), illuminations, post-apply bake (PAB) and post exposure bake (PEB) temperatures, were investigated by PSD analysis. For some of the above conditions, post-develop and post-etch LWR were also studied.
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